Update CHANGELOG, prepare -rc2

[platform/kernel/u-boot.git] / board / esd / pmc405 / pmc405.c

diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c
index 5ff87e7..e7415e4 100644 (file)
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -48,13 +48,13 @@ int board_early_init_f (void)
         * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
         */
-       mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
-       mtdcr(uicer, 0x00000000); /* disable all ints */
-       mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
-       mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
-       mtdcr(uictr, 0x10000000); /* set int trigger levels */
-       mtdcr(uicvcr, 0x00000001); /* set vect base=0, INT0 highest priority */
-       mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+       mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
+       mtdcr(UIC0ER, 0x00000000); /* disable all ints */
+       mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/
+       mtdcr(UIC0PR, 0xFFFFFF81); /* set int polarities */
+       mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
+       mtdcr(UIC0VCR, 0x00000001); /* set vect base=0, INT0 highest priority */
+       mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
 
        /*
         * EBC Configuration Register: