odroid: remove CONFIG_DM_I2C_COMPAT config

[platform/kernel/u-boot.git] / board / esd / mecp5123 / mecp5123.c

diff --git a/board/esd/mecp5123/mecp5123.c b/board/esd/mecp5123/mecp5123.c
index 748ad7c..78a6b66 100644 (file)
--- a/board/esd/mecp5123/mecp5123.c
+++ b/board/esd/mecp5123/mecp5123.c
@@ -3,24 +3,7 @@
  * (C) Copyright 2009 Dave Srl www.dave.eu
  * (C) Copyright 2009 Stefan Roese <sr@denx.de>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -33,50 +16,17 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Clocks in use */
-#define SCCR1_CLOCKS_EN        (CLOCK_SCCR1_CFG_EN |                           \
-                        CLOCK_SCCR1_LPC_EN |                           \
-                        CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |       \
-                        CLOCK_SCCR1_PSCFIFO_EN |                       \
-                        CLOCK_SCCR1_DDR_EN |                           \
-                        CLOCK_SCCR1_FEC_EN |                           \
-                        CLOCK_SCCR1_NFC_EN |                           \
-                        CLOCK_SCCR1_PCI_EN |                           \
-                        CLOCK_SCCR1_TPR_EN)
-
-#define SCCR2_CLOCKS_EN        (CLOCK_SCCR2_MEM_EN |   \
-                        CLOCK_SCCR2_I2C_EN)
-
 int eeprom_write_enable(unsigned dev_addr, int state)
 {
-       volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-
-       if (dev_addr != CONFIG_SYS_I2C_EEPROM_ADDR)
-               return -1;
-
-       if (state == 0)
-               setbits_be32(&im->gpio.gpdat, 0x00100000);
-       else
-               clrbits_be32(&im->gpio.gpdat, 0x00100000);
-
-       return 0;
+       return -ENOSYS;
 }
 
 int board_early_init_f(void)
 {
        volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-       u32 spridr;
        int i;
 
        /*
-        * Initialize Local Window for NOR FLASH access
-        */
-       out_be32(&im->sysconf.lpcs0aw,
-                CSAW_START(CONFIG_SYS_FLASH_BASE) |
-                CSAW_STOP(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE));
-       sync_law(&im->sysconf.lpcs0aw);
-
-       /*
         * Initialize Local Window for boot access
         */
        out_be32(&im->sysconf.lpbaw,
@@ -84,37 +34,6 @@ int board_early_init_f(void)
        sync_law(&im->sysconf.lpbaw);
 
        /*
-        * Initialize Local Window for VPC3 access
-        */
-       out_be32(&im->sysconf.lpcs1aw,
-                CSAW_START(CONFIG_SYS_VPC3_BASE) |
-                CSAW_STOP(CONFIG_SYS_VPC3_BASE, CONFIG_SYS_VPC3_SIZE));
-       sync_law(&im->sysconf.lpcs1aw);
-
-       /*
-        * Configure Flash Speed
-        */
-       out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
-       /*
-        * Configure VPC3 Speed
-        */
-       out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
-
-       spridr = in_be32(&im->sysconf.spridr);
-       if (SVR_MJREV(spridr) >= 2)
-               out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
-
-       /*
-        * Enable clocks
-        */
-       out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
-       out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
-#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
-       setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
-#endif
-
-       /*
         * Configure MSCAN clocks
         */
        for (i=0; i<4; ++i) {
@@ -133,9 +52,11 @@ int board_early_init_f(void)
        return 0;
 }
 
-phys_size_t initdram(int board_type)
+int dram_init(void)
 {
-       return get_ram_size(0, fixed_sdram(NULL, NULL, 0));
+       gd->ram_size = get_ram_size(0, fixed_sdram(NULL, NULL, 0));
+
+       return 0;
 }
 
 int misc_init_r(void)
@@ -269,9 +190,11 @@ int checkboard(void)
        return 0;
 }
 
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
+#ifdef CONFIG_OF_BOARD_SETUP
+int ft_board_setup(void *blob, bd_t *bd)
 {
        ft_cpu_setup(blob, bd);
+
+       return 0;
 }
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+#endif /* CONFIG_OF_BOARD_SETUP */