Merge branch 'next' of ../next

[platform/kernel/u-boot.git] / board / esd / du440 / du440.c

diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c
index 866dcaf..111cce5 100644 (file)
--- a/board/esd/du440/du440.c
+++ b/board/esd/du440/du440.c
@@ -360,77 +360,6 @@ int checkboard(void)
        return (0);
 }
 
-/*
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- */
-#if defined(CONFIG_PCI)
-int pci_pre_init(struct pci_controller *hose)
-{
-       unsigned long addr;
-
-       /*
-        * Set priority for all PLB3 devices to 0.
-        * Set PLB3 arbiter to fair mode.
-        */
-       mfsdr(SD0_AMP1, addr);
-       mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
-       addr = mfdcr(PLB3_ACR);
-       mtdcr(PLB3_ACR, addr | 0x80000000);
-
-       /*
-        * Set priority for all PLB4 devices to 0.
-        */
-       mfsdr(SD0_AMP0, addr);
-       mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
-       addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
-       mtdcr(PLB4_ACR, addr);
-
-       /*
-        * Set Nebula PLB4 arbiter to fair mode.
-        */
-       /* Segment0 */
-       addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
-       addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
-       addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
-       addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
-       mtdcr(PLB0_ACR, addr);
-
-       /* Segment1 */
-       addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
-       addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
-       addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
-       addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
-       mtdcr(PLB1_ACR, addr);
-
-       return 1;
-}
-#endif /* defined(CONFIG_PCI) */
-
-#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
-void pci_master_init(struct pci_controller *hose)
-{
-       unsigned short temp_short;
-
-       /*
-        * Write the PowerPC440 EP PCI Configuration regs.
-        * Enable PowerPC440 EP to be a master on the PCI bus (PMM).
-        * Enable PowerPC440 EP to act as a PCI memory target (PTM).
-        */
-       pci_read_config_word(0, PCI_COMMAND, &temp_short);
-       pci_write_config_word(0, PCI_COMMAND,
-                             temp_short | PCI_COMMAND_MASTER |
-                             PCI_COMMAND_MEMORY);
-}
-#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
-
 int last_stage_init(void)
 {
        int e, i;