engicam: Move uart mux init to SPL
[platform/kernel/u-boot.git] / board / engicam / icorem6_rqs / icorem6_rqs.c
index e3c520f..d6ca62d 100644 (file)
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <mmc.h>
 
 #include <asm/io.h>
 #include <asm/gpio.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
-       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
-       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+int board_init(void)
+{
+       /* Address of boot parameters */
+       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-static iomux_v3_cfg_t const uart4_pads[] = {
-       IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-       IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
+       return 0;
+}
 
-int board_early_init_f(void)
+#ifdef CONFIG_ENV_IS_IN_MMC
+int board_mmc_get_env_dev(int devno)
 {
-       SETUP_IOMUX_PADS(uart4_pads);
+       /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */
+       return (devno == 3) ? 1 : 0;
+}
 
-       return 0;
+static void mmc_late_init(void)
+{
+       char cmd[32];
+       char mmcblk[32];
+       u32 dev_no = mmc_get_env_dev();
+
+       setenv_ulong("mmcdev", dev_no);
+
+       /* Set mmcblk env */
+       sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
+       setenv("mmcroot", mmcblk);
+
+       sprintf(cmd, "mmc dev %d", dev_no);
+       run_command(cmd, 0);
 }
+#endif
 
-int board_init(void)
+int board_late_init(void)
 {
-       /* Address of boot parameters */
-       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+       switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
+                       IMX6_BMODE_SHIFT) {
+       case IMX6_BMODE_SD:
+       case IMX6_BMODE_ESD:
+       case IMX6_BMODE_MMC:
+       case IMX6_BMODE_EMMC:
+#ifdef CONFIG_ENV_IS_IN_MMC
+               mmc_late_init();
+#endif
+               setenv("modeboot", "mmcboot");
+               break;
+       default:
+               setenv("modeboot", "");
+               break;
+       }
+
+       if (is_mx6dq())
+               setenv("fdt_file", "imx6q-icore-rqs.dtb");
+       else if(is_mx6dl() || is_mx6solo())
+               setenv("fdt_file", "imx6dl-icore-rqs.dtb");
 
        return 0;
 }
@@ -59,6 +94,15 @@ int dram_init(void)
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
 
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
+       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
+       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const uart4_pads[] = {
+       IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+       IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
 /* MMC board initialization is needed till adding DM support in SPL */
 #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
 #include <mmc.h>
@@ -77,8 +121,22 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
        IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
 
-struct fsl_esdhc_cfg usdhc_cfg[1] = {
+static iomux_v3_cfg_t const usdhc4_pads[] = {
+       IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
+struct fsl_esdhc_cfg usdhc_cfg[2] = {
        {USDHC3_BASE_ADDR, 1, 4},
+       {USDHC4_BASE_ADDR, 1, 8},
 };
 
 int board_mmc_getcd(struct mmc *mmc)
@@ -88,6 +146,7 @@ int board_mmc_getcd(struct mmc *mmc)
 
        switch (cfg->esdhc_base) {
        case USDHC3_BASE_ADDR:
+       case USDHC4_BASE_ADDR:
                ret = 1;
                break;
        }
@@ -102,7 +161,8 @@ int board_mmc_init(bd_t *bis)
        /*
        * According to the board_mmc_init() the following map is done:
        * (U-boot device node)    (Physical Port)
-       * mmc0                          USDHC3
+       * mmc0                  USDHC3
+       * mmc1                  USDHC4
        */
        for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
                switch (i) {
@@ -110,6 +170,10 @@ int board_mmc_init(bd_t *bis)
                        SETUP_IOMUX_PADS(usdhc3_pads);
                        usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
                        break;
+               case 1:
+                       SETUP_IOMUX_PADS(usdhc4_pads);
+                       usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+                       break;
                default:
                        printf("Warning - USDHC%d controller not supporting\n",
                               i + 1);
@@ -153,6 +217,18 @@ void board_boot_order(u32 *spl_boot_list)
 #endif
 #endif
 
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+       if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs"))
+               return 0;
+       else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs"))
+               return 0;
+       else
+               return -1;
+}
+#endif
+
 /*
  * Driving strength:
  *   0x30 == 40 Ohm
@@ -405,7 +481,7 @@ void board_init_f(ulong dummy)
        gpr_init();
 
        /* iomux */
-       board_early_init_f();
+       SETUP_IOMUX_PADS(uart4_pads);
 
        /* setup GP timer */
        timer_init();