arm: Remove pxa255_idp, zipitz2 boards

[platform/kernel/u-boot.git] / board / davedenx / qong / qong.c

diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index 9fca1f8..ad1694b 100644 (file)
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -2,23 +2,7 @@
  *
  * (c) 2009 Emcraft Systems, Ilya Yanok <yanok@emcraft.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -28,21 +12,16 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 #include <nand.h>
+#include <power/pmic.h>
 #include <fsl_pmic.h>
 #include <asm/gpio.h>
 #include "qong_fpga.h"
 #include <watchdog.h>
+#include <errno.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_HW_WATCHDOG
-void hw_watchdog_reset(void)
-{
-       mxc_hw_watchdog_reset();
-}
-#endif
-
-int dram_init (void)
+int dram_init(void)
 {
        /* dram_init must store complete ramsize in gd->ram_size */
        gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
@@ -59,7 +38,7 @@ static void qong_fpga_reset(void)
        udelay(300);
 }
 
-int board_early_init_f (void)
+int board_early_init_f(void)
 {
 #ifdef CONFIG_QONG_FPGA
        /* CS1: FPGA/Network Controller/GPIO, 16-bit, no DTACK */
@@ -119,12 +98,6 @@ int board_early_init_f (void)
        mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_STP, MUX_CTL_FUNC));
        mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA0, MUX_CTL_FUNC));
        mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA1, MUX_CTL_FUNC));
-       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD3, MUX_CTL_FUNC));
-       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD3, MUX_CTL_FUNC));
-       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SCK3, MUX_CTL_FUNC));
-       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SFS3, MUX_CTL_FUNC));
-       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD6, MUX_CTL_FUNC));
-       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD6, MUX_CTL_FUNC));
 
 #define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
                        PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
@@ -142,13 +115,13 @@ int board_early_init_f (void)
        mx31_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG);       /* USBH2_DATA6 */
        mx31_set_pad(MX31_PIN_STXD3, H2_PAD_CFG);       /* USBH2_DATA7 */
 
-       writel(readl((IOMUXC_BASE + 0x8)) | (1 << 11), IOMUXC_BASE + 0x8);
+       mx31_set_gpr(MUX_PGP_UH2, 1);
 
        return 0;
 
 }
 
-int board_init (void)
+int board_init(void)
 {
        /* Chip selects */
        /* CS0: Nor Flash #0 - it must be init'ed when executing from DDR */
@@ -176,26 +149,35 @@ int board_init (void)
 int board_late_init(void)
 {
        u32 val;
+       struct pmic *p;
+       int ret;
+
+       ret = pmic_init(I2C_PMIC);
+       if (ret)
+               return ret;
 
+       p = pmic_get("FSL_PMIC");
+       if (!p)
+               return -ENODEV;
        /* Enable RTC battery */
-       val = pmic_reg_read(REG_POWER_CTL0);
-       pmic_reg_write(REG_POWER_CTL0, val | COINCHEN);
-       pmic_reg_write(REG_INT_STATUS1, RTCRSTI);
+       pmic_reg_read(p, REG_POWER_CTL0, &val);
+       pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
+       pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
 
 #ifdef CONFIG_HW_WATCHDOG
-       mxc_hw_watchdog_enable();
+       hw_watchdog_init();
 #endif
 
        return 0;
 }
 
-int checkboard (void)
+int checkboard(void)
 {
        printf("Board: DAVE/DENX Qong\n");
        return 0;
 }
 
-int misc_init_r (void)
+int misc_init_r(void)
 {
 #ifdef CONFIG_QONG_FPGA
        u32 tmp;
@@ -232,7 +214,7 @@ static void board_nand_setup(void)
 
        mxc_setup_weimcs(3, &cs3);
 
-       __REG(IOMUXC_GPR) |= 1 << 13;
+       mx31_set_gpr(MUX_SDCTL_CSD1_SEL, 1);
 
        mx31_gpio_mux(IOMUX_MODE(MUX_CTL_NFC_WP, MUX_CTL_IN_GPIO));
        mx31_gpio_mux(IOMUX_MODE(MUX_CTL_NFC_CE, MUX_CTL_IN_GPIO));