Merge with git://www.denx.de/git/u-boot.git

[platform/kernel/u-boot.git] / board / cds / common / via.c

diff --git a/board/cds/common/via.c b/board/cds/common/via.c
index 68c8d21..4a63d77 100644 (file)
--- a/board/cds/common/via.c
+++ b/board/cds/common/via.c
@@ -24,14 +24,20 @@
 #include <pci.h>
 
 /* Config the VIA chip */
-void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via(struct pci_controller *hose,
+                       pci_dev_t dev, struct pci_config_table *tab)
 {
        pci_dev_t bridge;
+       unsigned int cmdstat;
 
        /* Enable USB and IDE functions */
        pci_hose_write_config_byte(hose, dev, 0x48, 0x08);
 
-       pciauto_config_device(hose, dev);
+       pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
+       cmdstat |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY| PCI_COMMAND_MASTER;
+       pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
+       pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+       pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
 
        /*
         * Force the backplane P2P bridge to have a window
@@ -39,7 +45,7 @@ void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_c
         * This allows legacy I/O (i8259, etc) on the VIA
         * southbridge to be accessed.
         */
-       bridge = PCI_BDF(0,17,0);
+       bridge = PCI_BDF(0,BRIDGE_ID,0);
        pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0);
        pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0);
        pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10);
@@ -47,7 +53,8 @@ void mpc85xx_config_via(struct pci_controller* hose, pci_dev_t dev, struct pci_c
 }
 
 /* Function 1, IDE */
-void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_usbide(struct pci_controller *hose,
+                              pci_dev_t dev, struct pci_config_table *tab)
 {
        pciauto_config_device(hose, dev);
        /*
@@ -64,7 +71,8 @@ void mpc85xx_config_via_usbide(struct pci_controller* hose, pci_dev_t dev, struc
 }
 
 /* Function 2, USB ports 0-1 */
-void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_usb(struct pci_controller *hose,
+                           pci_dev_t dev, struct pci_config_table *tab)
 {
        pciauto_config_device(hose, dev);
 
@@ -72,7 +80,8 @@ void mpc85xx_config_via_usb(struct pci_controller* hose, pci_dev_t dev, struct p
 }
 
 /* Function 3, USB ports 2-3 */
-void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_usb2(struct pci_controller *hose,
+                            pci_dev_t dev, struct pci_config_table *tab)
 {
        pciauto_config_device(hose, dev);
 
@@ -80,7 +89,8 @@ void mpc85xx_config_via_usb2(struct pci_controller* hose, pci_dev_t dev, struct
 }
 
 /* Function 5, Power Management */
-void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_power(struct pci_controller *hose,
+                             pci_dev_t dev, struct pci_config_table *tab)
 {
        pciauto_config_device(hose, dev);
 
@@ -90,10 +100,10 @@ void mpc85xx_config_via_power(struct pci_controller* hose, pci_dev_t dev, struct
 }
 
 /* Function 6, AC97 Interface */
-void mpc85xx_config_via_ac97(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *tab)
+void mpc85xx_config_via_ac97(struct pci_controller *hose,
+                            pci_dev_t dev, struct pci_config_table *tab)
 {
        pciauto_config_device(hose, dev);
 
        pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0x1c00);
 }
-