#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hmatrix.h>
+#include <asm/arch/portmux.h>
+#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
/* Enable SDRAM in the EBI mux */
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
- gpio_enable_ebi();
- gpio_enable_usart1();
+ portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
+ portmux_enable_usart1(PORTMUX_DRIVE_MIN);
#if defined(CONFIG_MACB)
- gpio_enable_macb0();
- gpio_enable_macb1();
+ portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
+ portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
#endif
#if defined(CONFIG_MMC)
- gpio_enable_mmci();
+ portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
+#endif
+#if defined(CONFIG_ATMEL_SPI)
+ portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
#endif
return 0;
unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
if (expected_size != actual_size)
- printf("Warning: Only %u of %u MiB SDRAM is working\n",
+ printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
-void board_init_info(void)
+int board_early_init_r(void)
{
gd->bd->bi_phy_id[0] = 0x01;
gd->bd->bi_phy_id[1] = 0x03;
+ return 0;
+}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bi)
+{
+ macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
+ macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
+ return 0;
+}
+#endif
+
+/* SPI chip select control */
+#ifdef CONFIG_ATMEL_SPI
+#include <spi.h>
+
+#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
}
+#endif /* CONFIG_ATMEL_SPI */