lcd: Let the board code show board-specific info

[platform/kernel/u-boot.git] / board / atmel / at91sam9263ek / at91sam9263ek.c

diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index a6268a6..63f95e7 100644 (file)
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -23,6 +23,7 @@
  */
 
 #include <common.h>
+#include <asm/sizes.h>
 #include <asm/arch/at91sam9263.h>
 #include <asm/arch/at91sam9263_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
@@ -30,9 +31,13 @@
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
+#include <asm/arch/hardware.h>
+#include <lcd.h>
+#include <atmel_lcdc.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
 #include <net.h>
 #endif
+#include <netdev.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -80,8 +85,8 @@ static void at91sam9263ek_nand_hw_init(void)
 
        /* Configure SMC CS3 for NAND/SmartMedia */
        at91_sys_write(AT91_SMC_SETUP(3),
-                      AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
-                      AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+                      AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+                      AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
        at91_sys_write(AT91_SMC_PULSE(3),
                       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
                       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
@@ -90,9 +95,9 @@ static void at91sam9263ek_nand_hw_init(void)
        at91_sys_write(AT91_SMC_MODE(3),
                       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
                       AT91_SMC_EXNWMODE_DISABLE |
-#ifdef CFG_NAND_DBW_16
+#ifdef CONFIG_SYS_NAND_DBW_16
                       AT91_SMC_DBW_16 |
-#else /* CFG_NAND_DBW_8 */
+#else /* CONFIG_SYS_NAND_DBW_8 */
                       AT91_SMC_DBW_8 |
 #endif
                       AT91_SMC_TDF_(2));
@@ -144,7 +149,7 @@ static void at91sam9263ek_macb_hw_init(void)
 
        /* Need to reset PHY -> 500ms reset */
        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    AT91_RSTC_ERSTL | (0x0D << 8) |
+                                    (AT91_RSTC_ERSTL & (0x0D << 8)) |
                                     AT91_RSTC_URSTEN);
 
        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
@@ -152,6 +157,11 @@ static void at91sam9263ek_macb_hw_init(void)
        /* Wait for end hardware reset */
        while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
 
+       /* Restore NRST value */
+       at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+                                    (AT91_RSTC_ERSTL & (0x0 << 8)) |
+                                    AT91_RSTC_URSTEN);
+
        /* Re-enable pull-up */
        writel(pin_to_mask(AT91_PIN_PC25),
               pin_to_controller(AT91_PIN_PC0) + PIO_PUER);
@@ -193,6 +203,94 @@ static void at91sam9263ek_uhp_hw_init(void)
 }
 #endif
 
+#ifdef CONFIG_LCD
+vidinfo_t panel_info = {
+       vl_col:         240,
+       vl_row:         320,
+       vl_clk:         4965000,
+       vl_sync:        ATMEL_LCDC_INVLINE_INVERTED |
+                       ATMEL_LCDC_INVFRAME_INVERTED,
+       vl_bpix:        3,
+       vl_tft:         1,
+       vl_hsync_len:   5,
+       vl_left_margin: 1,
+       vl_right_margin:33,
+       vl_vsync_len:   1,
+       vl_upper_margin:1,
+       vl_lower_margin:0,
+       mmio:           AT91SAM9263_LCDC_BASE,
+};
+
+void lcd_enable(void)
+{
+       at91_set_gpio_value(AT91_PIN_PA30, 1);  /* power up */
+}
+
+void lcd_disable(void)
+{
+       at91_set_gpio_value(AT91_PIN_PA30, 0);  /* power down */
+}
+
+static void at91sam9263ek_lcd_hw_init(void)
+{
+       at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
+       at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
+       at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
+       at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
+       at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
+       at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
+       at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
+       at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
+       at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
+       at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
+       at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
+       at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
+       at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
+       at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD13 */
+       at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
+       at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
+       at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
+       at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
+       at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
+       at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD21 */
+       at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
+       at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
+
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC);
+
+       gd->fb_base = AT91SAM9263_SRAM0_BASE;
+}
+
+#ifdef CONFIG_LCD_INFO
+#include <nand.h>
+#include <version.h>
+
+void lcd_show_board_info(void)
+{
+       ulong dram_size, nand_size;
+       int i;
+       char temp[32];
+
+       lcd_printf ("%s\n", U_BOOT_VERSION);
+       lcd_printf ("(C) 2008 ATMEL Corp\n");
+       lcd_printf ("at91support@atmel.com\n");
+       lcd_printf ("%s CPU at %s MHz\n",
+               AT91_CPU_NAME,
+               strmhz(temp, AT91_MAIN_CLOCK));
+
+       dram_size = 0;
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
+               dram_size += gd->bd->bi_dram[i].size;
+       nand_size = 0;
+       for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
+               nand_size += nand_info[i].size;
+       lcd_printf ("  %ld MB SDRAM, %ld MB NAND\n",
+               dram_size >> 20,
+               nand_size >> 20 );
+}
+#endif /* CONFIG_LCD_INFO */
+#endif
+
 int board_init(void)
 {
        /* Enable Ctrlc */
@@ -216,6 +314,9 @@ int board_init(void)
 #ifdef CONFIG_USB_OHCI_NEW
        at91sam9263ek_uhp_hw_init();
 #endif
+#ifdef CONFIG_LCD
+       at91sam9263ek_lcd_hw_init();
+#endif
        return 0;
 }
 
@@ -238,3 +339,12 @@ void reset_phy(void)
 #endif
 }
 #endif
+
+int board_eth_init(bd_t *bis)
+{
+       int rc = 0;
+#ifdef CONFIG_MACB
+       rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00);
+#endif
+       return rc;
+}