ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint mode

[platform/kernel/u-boot.git] / board / amcc / yucca / yucca.c

diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 7316c34..efdf814 100644 (file)
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -27,27 +27,23 @@
 
 #include <common.h>
 #include <ppc4xx.h>
-#include <asm/processor.h>
 #include <i2c.h>
-#include <asm-ppc/io.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/4xx_pcie.h>
 
 #include "yucca.h"
-#include "../cpu/ppc4xx/440spe_pcie.h"
 
-#undef PCIE_ENDPOINT
-/* #define PCIE_ENDPOINT 1 */
+DECLARE_GLOBAL_DATA_PTR;
 
-void fpga_init (void);
 
+void fpga_init (void);
 void get_sys_info(PPC440_SYS_INFO *board_cfg );
 int compare_to_true(char *str );
 char *remove_l_w_space(char *in_str );
 char *remove_t_w_space(char *in_str );
 int get_console_port(void);
 
-int ppc440spe_init_pcie_rootport(int port);
-void ppc440spe_setup_pcie(struct pci_controller *hose, int port);
-
 #define DEBUG_ENV
 #ifdef DEBUG_ENV
 #define DEBUGF(fmt,args...) printf(fmt ,##args)
@@ -562,6 +558,40 @@ int checkboard (void)
        return 0;
 }
 
+/*
+ * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * board specific values.
+ */
+static int ppc440spe_rev_a(void)
+{
+       if ((get_pvr() == PVR_440SPe_6_RA) || (get_pvr() == PVR_440SPe_RA))
+               return 1;
+       else
+               return 0;
+}
+
+u32 ddr_wrdtr(u32 default_val) {
+       /*
+        * Yucca boards with 440SPe rev. A need a slightly different setup
+        * for the MCIF0_WRDTR register.
+        */
+       if (ppc440spe_rev_a())
+               return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_270_DEG_ADV);
+
+       return default_val;
+}
+
+u32 ddr_clktr(u32 default_val) {
+       /*
+        * Yucca boards with 440SPe rev. A need a slightly different setup
+        * for the MCIF0_CLKTR register.
+        */
+       if (ppc440spe_rev_a())
+               return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
+
+       return default_val;
+}
+
 #if defined(CFG_DRAM_TEST)
 int testdram (void)
 {
@@ -634,8 +664,6 @@ int pci_pre_init(struct pci_controller * hose )
 #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller * hose )
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        /*-------------------------------------------------------------------+
         * Disable everything
         *-------------------------------------------------------------------*/
@@ -812,60 +840,75 @@ void yucca_setup_pcie_fpga_endpoint(int port)
 
 static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
 
-void pcie_setup_hoses(void)
+void pcie_setup_hoses(int busno)
 {
        struct pci_controller *hose;
        int i, bus;
+       int ret = 0;
+       char *env;
+       unsigned int delay;
 
        /*
         * assume we're called after the PCIX hose is initialized, which takes
         * bus ID 0 and therefore start numbering PCIe's from 1.
         */
-       bus = 1;
+       bus = busno;
        for (i = 0; i <= 2; i++) {
                /* Check for yucca card presence */
                if (!yucca_pcie_card_present(i))
                        continue;
 
-#ifdef PCIE_ENDPOINT
-               yucca_setup_pcie_fpga_endpoint(i);
-               if (ppc440spe_init_pcie_endport(i)) {
-#else
-               yucca_setup_pcie_fpga_rootpoint(i);
-               if (ppc440spe_init_pcie_rootport(i)) {
-#endif
-                       printf("PCIE%d: initialization failed\n", i);
-                       continue;
+               if (is_end_point(i)) {
+                       printf("PCIE%d: will be configured as endpoint\n",i);
+                       yucca_setup_pcie_fpga_endpoint(i);
+                       ret = ppc4xx_init_pcie_endport(i);
+               } else {
+                       printf("PCIE%d: will be configured as root-complex\n",i);
+                       yucca_setup_pcie_fpga_rootpoint(i);
+                       ret = ppc4xx_init_pcie_rootport(i);
                }
+               if (ret) {
+                       printf("PCIE%d: initialization failed\n", i);
+                       continue;
+               }
 
                hose = &pcie_hose[i];
                hose->first_busno = bus;
-               hose->last_busno  = bus;
-               bus++;
+               hose->last_busno = bus;
+               hose->current_busno = bus;
 
                /* setup mem resource */
                pci_set_region(hose->regions + 0,
                        CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE,
                        CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE,
                        CFG_PCIE_MEMSIZE,
-                       PCI_REGION_MEM
-                       );
+                       PCI_REGION_MEM);
                hose->region_count = 1;
                pci_register_hose(hose);
 
-#ifdef PCIE_ENDPOINT
-               ppc440spe_setup_pcie_endpoint(hose, i);
-               /*
-                * Reson for no scanning is endpoint can not generate
-                * upstream configuration accesses.
-                */
-#else
-               ppc440spe_setup_pcie_rootpoint(hose, i);
-               /*
-                * Config access can only go down stream
-                */
-               hose->last_busno = pci_hose_scan(hose);
-#endif
+               if (is_end_point(i)) {
+                       ppc4xx_setup_pcie_endpoint(hose, i);
+                       /*
+                        * Reson for no scanning is endpoint can not generate
+                        * upstream configuration accesses.
+                        */
+               } else {
+                       ppc4xx_setup_pcie_rootpoint(hose, i);
+                       env = getenv("pciscandelay");
+                       if (env != NULL) {
+                               delay = simple_strtoul(env, NULL, 10);
+                               if (delay > 5)
+                                       printf("Warning, expect noticable delay before "
+                                              "PCIe scan due to 'pciscandelay' value!\n");
+                               mdelay(delay * 1000);
+                       }
+
+                       /*
+                        * Config access can only go down stream
+                        */
+                       hose->last_busno = pci_hose_scan(hose);
+                       bus = hose->last_busno + 1;
+               }
        }
 }
 #endif /* defined(CONFIG_PCI) */