[PPC440SPe] Improve PCIe configuration space access

[platform/kernel/u-boot.git] / board / amcc / yucca / yucca.c

diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 7316c34..252e4fe 100644 (file)
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -562,6 +562,40 @@ int checkboard (void)
        return 0;
 }
 
+/*
+ * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * board specific values.
+ */
+static int ppc440spe_rev_a(void)
+{
+       if ((get_pvr() == PVR_440SPe_6_RA) || (get_pvr() == PVR_440SPe_RA))
+               return 1;
+       else
+               return 0;
+}
+
+u32 ddr_wrdtr(u32 default_val) {
+       /*
+        * Yucca boards with 440SPe rev. A need a slightly different setup
+        * for the MCIF0_WRDTR register.
+        */
+       if (ppc440spe_rev_a())
+               return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_270_DEG_ADV);
+
+       return default_val;
+}
+
+u32 ddr_clktr(u32 default_val) {
+       /*
+        * Yucca boards with 440SPe rev. A need a slightly different setup
+        * for the MCIF0_CLKTR register.
+        */
+       if (ppc440spe_rev_a())
+               return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
+
+       return default_val;
+}
+
 #if defined(CFG_DRAM_TEST)
 int testdram (void)
 {
@@ -812,7 +846,7 @@ void yucca_setup_pcie_fpga_endpoint(int port)
 
 static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
 
-void pcie_setup_hoses(void)
+void pcie_setup_hoses(int busno)
 {
        struct pci_controller *hose;
        int i, bus;
@@ -821,7 +855,7 @@ void pcie_setup_hoses(void)
         * assume we're called after the PCIX hose is initialized, which takes
         * bus ID 0 and therefore start numbering PCIe's from 1.
         */
-       bus = 1;
+       bus = busno;
        for (i = 0; i <= 2; i++) {
                /* Check for yucca card presence */
                if (!yucca_pcie_card_present(i))
@@ -840,8 +874,8 @@ void pcie_setup_hoses(void)
 
                hose = &pcie_hose[i];
                hose->first_busno = bus;
-               hose->last_busno  = bus;
-               bus++;
+               hose->last_busno = bus;
+               hose->current_busno = bus;
 
                /* setup mem resource */
                pci_set_region(hose->regions + 0,
@@ -865,6 +899,7 @@ void pcie_setup_hoses(void)
                 * Config access can only go down stream
                 */
                hose->last_busno = pci_hose_scan(hose);
+               bus = hose->last_busno + 1;
 #endif
        }
 }