*
* (C) Copyright 2006
* Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
- * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
+ * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
#include <common.h>
#include <libfdt.h>
#include <fdt_support.h>
-#include <ppc440.h>
+#include <ppc4xx.h>
#include <asm/gpio.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/bitops.h>
-#include <asm/ppc4xx-intvec.h>
DECLARE_GLOBAL_DATA_PTR;
/* enable USB device */
out_8((u8 *) CFG_BCSR_BASE + 0x09, 0x20);
- /* select Ethernet pins */
+ /* select Ethernet (and optionally IIC1) pins */
mfsdr(SDR0_PFC1, sdr0_pfc1);
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SELECT_MASK) |
SDR0_PFC1_SELECT_CONFIG_4;
+#ifdef CONFIG_I2C_MULTI_BUS
+ sdr0_pfc1 |= ((sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_IIC1_SEL);
+#endif
+ /* Two UARTs, so we need 4-pin mode. Also, we want CTS/RTS mode. */
+ sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_4PINS;
+ sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U0ME_CTS_RTS;
+ sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_CTS_RTS;
+
mfsdr(SDR0_PFC2, sdr0_pfc2);
sdr0_pfc2 = (sdr0_pfc2 & ~SDR0_PFC2_SELECT_MASK) |
SDR0_PFC2_SELECT_CONFIG_4;
mtdcr(ebccfga, pb0cr);
#endif
pbcr = mfdcr(ebccfgd);
- size_val = ffs(gd->bd->bi_flashsize) - 21;
+ size_val = ffs(gd->bd->bi_flashsize) - 21;
pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
mtdcr(ebccfga, pb3cr);
*/
flash_get_size(gd->bd->bi_flashstart, 0);
-#ifdef CFG_ENV_IS_IN_FLASH
+#ifdef CONFIG_ENV_IS_IN_FLASH
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
-CFG_MONITOR_LEN,
/* Env protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
- CFG_ENV_ADDR_REDUND,
- CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
+ CONFIG_ENV_ADDR_REDUND,
+ CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
&flash_info[0]);
#endif
return (0);
}
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
-{
- unsigned long *mem = (unsigned long *)0;
- const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
-
- mtmsr(0);
-
- for (k = 0; k < CFG_MBYTES_SDRAM;
- ++k, mem += (1024 / sizeof(unsigned long))) {
- if ((k & 1023) == 0) {
- printf("%3d MB\r", k / 1024);
- }
-
- memset(mem, 0xaaaaaaaa, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
-
- memset(mem, 0x55555555, 1024);
- for (n = 0; n < kend; ++n) {
- if (mem[n] != 0x55555555) {
- printf("SDRAM test fails at: %08x\n",
- (uint) & mem[n]);
- return 1;
- }
- }
- }
- printf("SDRAM test passes\n");
- return 0;
-}
-#endif
-
#if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP)
/*
* Assign interrupts to PCI devices.
*/
void sequoia_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
- pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIR2);
+ pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIRQ2);
}
#endif
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
- u32 val[4];
- int rc;
-
- ft_cpu_setup(blob, bd);
-
- /* Fixup NOR mapping */
- val[0] = 0; /* chip select number */
- val[1] = 0; /* always 0 */
- val[2] = gd->bd->bi_flashstart;
- val[3] = gd->bd->bi_flashsize;
- rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
- val, sizeof(val), 1);
- if (rc)
- printf("Unable to update property NOR mapping, err=%s\n",
- fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */