(0x80000000 >> (28 + CFG_NAND_CS));
mtsdr(SDR0_CUST0, sdr0_cust0);
- /* Update EBC speed after booting from i2c bootstrap settings
- * on newer boards with 33.333 MHZ Clocks
- */
- if (in8(CFG_BCSR_BASE + 3) & 0x80)
- mtcpr(0xe0, 0x02000000);
-
return 0;
}