ppc4xx: Add CONFIG_4xx_DCACHE compile options to enable cached SDRAM

[platform/kernel/u-boot.git] / board / amcc / sequoia / init.S

diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S
index 5fe3af9..c7da521 100644 (file)
--- a/board/amcc/sequoia/init.S
+++ b/board/amcc/sequoia/init.S
@@ -98,7 +98,11 @@ tlbtab:
 #endif
 
        /* TLB-entry for DDR SDRAM (Up to 2GB) */
+#ifdef CONFIG_4xx_DCACHE
+       tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G)
+#else
        tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
+#endif
 
 #ifdef CFG_INIT_RAM_DCACHE
        /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */