Merge branch 'next' of ../next

[platform/kernel/u-boot.git] / board / amcc / luan / luan.c

diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 94ba643..332d170 100644 (file)
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -127,79 +127,6 @@ u32 ddr_clktr(u32 default_val) {
 }
 
 /*************************************************************************
- *  pci_pre_init
- *
- *  This routine is called just prior to registering the hose and gives
- *  the board the opportunity to check things. Returning a value of zero
- *  indicates that things are bad & PCI initialization should be aborted.
- *
- *     Different boards may wish to customize the pci controller structure
- *     (add regions, override default access routines, etc) or perform
- *     certain pre-initialization actions.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI)
-int pci_pre_init( struct pci_controller *hose )
-{
-       unsigned long strap;
-
-       /*--------------------------------------------------------------------------+
-        *      The luan board is always configured as the host & requires the
-        *      PCI arbiter to be enabled.
-        *--------------------------------------------------------------------------*/
-       mfsdr(SDR0_SDSTP1, strap);
-       if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
-               printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
-
-               return  0;
-       }
-
-       return  1;
-}
-#endif /* defined(CONFIG_PCI) */
-
-
-/*************************************************************************
- *  pci_target_init
- *
- *     The bootstrap configuration provides default settings for the pci
- *     inbound map (PIM). But the bootstrap config choices are limited and
- *     may not be sufficient for a given board.
- *
- ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller *hose)
-{
-       /*--------------------------------------------------------------------------+
-        * Disable everything
-        *--------------------------------------------------------------------------*/
-       out32r( PCIL0_PIM0SA, 0 ); /* disable */
-       out32r( PCIL0_PIM1SA, 0 ); /* disable */
-       out32r( PCIL0_PIM2SA, 0 ); /* disable */
-       out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
-
-       /*--------------------------------------------------------------------------+
-        * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
-        * options to not support sizes such as 128/256 MB.
-        *--------------------------------------------------------------------------*/
-       out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
-       out32r( PCIL0_PIM0LAH, 0 );
-       out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
-
-       out32r( PCIL0_BAR0, 0 );
-
-       /*--------------------------------------------------------------------------+
-        * Program the board's subsystem id/vendor id
-        *--------------------------------------------------------------------------*/
-       out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
-       out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
-
-       out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
-}
-#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
-
-
-/*************************************************************************
  *  hw_watchdog_reset
  *
  *     This routine is called to reset (keep alive) the watchdog timer