[PPC440SPe] Improve PCIe configuration space access

[platform/kernel/u-boot.git] / board / amcc / katmai / katmai.c

diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index b804d55..a9ae4a3 100644 (file)
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -392,7 +392,7 @@ int katmai_pcie_card_present(int port)
 
 static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
 
-void pcie_setup_hoses(void)
+void pcie_setup_hoses(int busno)
 {
        struct pci_controller *hose;
        int i, bus;
@@ -401,7 +401,7 @@ void pcie_setup_hoses(void)
         * assume we're called after the PCIX hose is initialized, which takes
         * bus ID 0 and therefore start numbering PCIe's from 1.
         */
-       bus = 1;
+       bus = busno;
        for (i = 0; i <= 2; i++) {
                /* Check for katmai card presence */
                if (!katmai_pcie_card_present(i))
@@ -418,8 +418,8 @@ void pcie_setup_hoses(void)
 
                hose = &pcie_hose[i];
                hose->first_busno = bus;
-               hose->last_busno  = bus;
-               bus++;
+               hose->last_busno = bus;
+               hose->current_busno = bus;
 
                /* setup mem resource */
                pci_set_region(hose->regions + 0,
@@ -443,6 +443,7 @@ void pcie_setup_hoses(void)
                 * Config access can only go down stream
                 */
                hose->last_busno = pci_hose_scan(hose);
+               bus = hose->last_busno + 1;
 #endif
        }
 }