Merge branch 'Makefile' of git://git.denx.de/u-boot-arm

[platform/kernel/u-boot.git] / board / amcc / katmai / katmai.c

diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index e41caaf..08d89d7 100644 (file)
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -258,36 +258,6 @@ u32 ddr_clktr(u32 default_val) {
        return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
 }
 
-#if defined(CFG_DRAM_TEST)
-int testdram (void)
-{
-       uint *pstart = (uint *) 0x00000000;
-       uint *pend = (uint *) 0x08000000;
-       uint *p;
-
-       for (p = pstart; p < pend; p++)
-               *p = 0xaaaaaaaa;
-
-       for (p = pstart; p < pend; p++) {
-               if (*p != 0xaaaaaaaa) {
-                       printf ("SDRAM test fails at: %08x\n", (uint) p);
-                       return 1;
-               }
-       }
-
-       for (p = pstart; p < pend; p++)
-               *p = 0x55555555;
-
-       for (p = pstart; p < pend; p++) {
-               if (*p != 0x55555555) {
-                       printf ("SDRAM test fails at: %08x\n", (uint) p);
-                       return 1;
-               }
-       }
-       return 0;
-}
-#endif
-
 /*************************************************************************
  *  pci_pre_init
  *
@@ -379,7 +349,7 @@ int is_pci_host(struct pci_controller *hose)
        return 1;
 }
 
-int katmai_pcie_card_present(int port)
+static int katmai_pcie_card_present(int port)
 {
        u32 val;
 
@@ -441,102 +411,32 @@ void pcie_setup_hoses(int busno)
                pci_register_hose(hose);
 
                if (is_end_point(i)) {
-                       ppc4xx_setup_pcie_endpoint(hose, i);
+                       ppc4xx_setup_pcie_endpoint(hose, i);
                        /*
                         * Reson for no scanning is endpoint can not generate
                         * upstream configuration accesses.
-                        */
+                        */
                } else {
-                       ppc4xx_setup_pcie_rootpoint(hose, i);
+                       ppc4xx_setup_pcie_rootpoint(hose, i);
                        env = getenv ("pciscandelay");
-                       if (env != NULL) {
-                               delay = simple_strtoul(env, NULL, 10);
+                       if (env != NULL) {
+                               delay = simple_strtoul(env, NULL, 10);
                                if (delay > 5)
-                                       printf("Warning, expect noticable delay before "
+                                       printf("Warning, expect noticable delay before "
                                               "PCIe scan due to 'pciscandelay' value!\n");
                                mdelay(delay * 1000);
                        }
 
-                       /*
-                        * Config access can only go down stream
-                        */
-                       hose->last_busno = pci_hose_scan(hose);
-                       bus = hose->last_busno + 1;
+                       /*
+                        * Config access can only go down stream
+                        */
+                       hose->last_busno = pci_hose_scan(hose);
+                       bus = hose->last_busno + 1;
                }
        }
 }
 #endif /* defined(CONFIG_PCI) */
 
-int misc_init_f (void)
-{
-       uint reg;
-#if defined(CONFIG_STRESS)
-       uint i ;
-       uint disp;
-#endif
-
-       /* minimal init for PCIe */
-#if 0 /* test-only: test endpoint at some time, for now rootpoint only */
-       /* pci express 0 Endpoint Mode */
-       mfsdr(SDR0_PE0DLPSET, reg);
-       reg &= (~0x00400000);
-       mtsdr(SDR0_PE0DLPSET, reg);
-#else
-       /* pci express 0 Rootpoint  Mode */
-       mfsdr(SDR0_PE0DLPSET, reg);
-       reg |= 0x00400000;
-       mtsdr(SDR0_PE0DLPSET, reg);
-#endif
-       /* pci express 1 Rootpoint  Mode */
-       mfsdr(SDR0_PE1DLPSET, reg);
-       reg |= 0x00400000;
-       mtsdr(SDR0_PE1DLPSET, reg);
-       /* pci express 2 Rootpoint  Mode */
-       mfsdr(SDR0_PE2DLPSET, reg);
-       reg |= 0x00400000;
-       mtsdr(SDR0_PE2DLPSET, reg);
-
-#if defined(CONFIG_STRESS)
-       /*
-        * All this setting done by linux only needed by stress an charac. test
-        * procedure
-        * PCIe 1 Rootpoint PCIe2 Endpoint
-        * PCIe 0 FIR Pre-emphasis Filter Coefficients & Transmit Driver Power Level
-        */
-       for (i=0,disp=0; i<8; i++,disp+=3) {
-               mfsdr(SDR0_PE0HSSSET1L0+disp, reg);
-               reg |= 0x33000000;
-               mtsdr(SDR0_PE0HSSSET1L0+disp, reg);
-       }
-
-       /*PCIe 1 FIR Pre-emphasis Filter Coefficients & Transmit Driver Power Level */
-       for (i=0,disp=0; i<4; i++,disp+=3) {
-               mfsdr(SDR0_PE1HSSSET1L0+disp, reg);
-               reg |= 0x33000000;
-               mtsdr(SDR0_PE1HSSSET1L0+disp, reg);
-       }
-
-       /*PCIE 2 FIR Pre-emphasis Filter Coefficients & Transmit Driver Power Level */
-       for (i=0,disp=0; i<4; i++,disp+=3) {
-               mfsdr(SDR0_PE2HSSSET1L0+disp, reg);
-               reg |= 0x33000000;
-               mtsdr(SDR0_PE2HSSSET1L0+disp, reg);
-       }
-
-       reg = 0x21242222;
-       mtsdr(SDR0_PE2UTLSET1, reg);
-       reg = 0x11000000;
-       mtsdr(SDR0_PE2UTLSET2, reg);
-       /* pci express 1 Endpoint  Mode */
-       reg = 0x00004000;
-       mtsdr(SDR0_PE2DLPSET, reg);
-
-       mtsdr(SDR0_UART1, 0x2080005a);  /* patch for TG */
-#endif
-
-       return 0;
-}
-
 #ifdef CONFIG_POST
 /*
  * Returns 1 if keys pressed to start the power-on long-running tests
@@ -547,24 +447,3 @@ int post_hotkeys_pressed(void)
        return (ctrlc());
 }
 #endif
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-       u32 val[4];
-       int rc;
-
-       ft_cpu_setup(blob, bd);
-
-       /* Fixup NOR mapping */
-       val[0] = 0;                             /* chip select number */
-       val[1] = 0;                             /* always 0 */
-       val[2] = gd->bd->bi_flashstart;
-       val[3] = gd->bd->bi_flashsize;
-       rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-                                 val, sizeof(val), 1);
-       if (rc)
-               printf("Unable to update property NOR mapping, err=%s\n",
-                      fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */