Merge branch 'master' of git://git.denx.de/u-boot-samsung

[platform/kernel/u-boot.git] / board / LaCie / netspace_v2 / netspace_v2.c

diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c
index 7c4b15e..16d6947 100644 (file)
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -6,40 +6,30 @@
  * Marvell Semiconductor <www.marvell.com>
  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
-#include <miiphy.h>
-#include <netdev.h>
 #include <command.h>
+#include <asm/mach-types.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/gpio.h>
+
 #include "netspace_v2.h"
+#include "../common/common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_early_init_f(void)
 {
        /* Gpio configuration */
-       kw_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
-                       NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
+       mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
+                         NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
 
        /* Multi-Purpose Pins Functionality configuration */
-       u32 kwmpp_config[] = {
+       static const u32 kwmpp_config[] = {
                MPP0_SPI_SCn,
                MPP1_SPI_MOSI,
                MPP2_SPI_SCK,
@@ -73,7 +63,7 @@ int board_early_init_f(void)
                MPP33_GPIO,             /* Fan speed (bit 2) */
                0
        };
-       kirkwood_mpp_conf(kwmpp_config);
+       kirkwood_mpp_conf(kwmpp_config, NULL);
 
        return 0;
 }
@@ -84,54 +74,38 @@ int board_init(void)
        gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
 
        /* Boot parameters address */
-       gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+       gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
        return 0;
 }
 
-void mv_phy_88e1116_init(char *name)
+#if defined(CONFIG_MISC_INIT_R)
+int misc_init_r(void)
 {
-       u16 reg;
-       u16 devadr;
-
-       if (miiphy_set_current_dev(name))
-               return;
-
-       /* command to read PHY dev address */
-       if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
-               printf("Err..(%s) could not read PHY dev address\n", __func__);
-               return;
+#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
+       if (!getenv("ethaddr")) {
+               uchar mac[6];
+               if (lacie_read_mac_address(mac) == 0)
+                       eth_setenv_enetaddr("ethaddr", mac);
        }
-
-       /*
-        * Enable RGMII delay on Tx and Rx for CPU port
-        * Ref: sec 4.7.2 of chip datasheet
-        */
-       miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
-       miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
-       reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-       miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
-       miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
-
-       /* reset the phy */
-       if (miiphy_read(name, devadr, MII_BMCR, &reg) != 0) {
-               printf("Err..(%s) PHY status read failed\n", __func__);
-               return;
-       }
-       if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
-               printf("Err..(%s) PHY reset failed\n", __func__);
-               return;
-       }
-
-       debug("88E1116 Initialized on %s\n", name);
+#endif
+       return 0;
 }
+#endif
 
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
 /* Configure and initialize PHY */
 void reset_phy(void)
 {
-       mv_phy_88e1116_init("egiga0");
+#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
+       mv_phy_88e1318_init("egiga0", 0);
+#else
+       mv_phy_88e1116_init("egiga0", 8);
+#endif
 }
+#endif
 
+#if defined(CONFIG_KIRKWOOD_GPIO)
 /* Return GPIO button status */
 static int
 do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -141,3 +115,4 @@ do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 U_BOOT_CMD(button, 1, 1, do_read_button,
           "Return GPIO button status 0=off 1=on", "");
+#endif