PowerPC64 notoc calls

[external/binutils.git] / bfd / elf64-ppc.c

diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index f795e3f..6162019 100644 (file)
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -2849,13 +2849,13 @@ must_be_dyn_reloc (struct bfd_link_info *info,
 
    There are also ELFv1 powerxx variants of these stubs.
    ppc_stub_long_branch_notoc:
-   .   paddi   %r12,dest@pcrel
+   .   pla     %r12,dest@pcrel
    .   b       dest
    ppc_stub_plt_branch_notoc:
    .   lis     %r11,(dest-1f)@highesta34
    .   ori     %r11,%r11,(dest-1f)@highera34
    .   sldi    %r11,%r11,34
-   . 1: paddi  %r12,dest@pcrel
+   . 1: pla    %r12,dest@pcrel
    .   add     %r12,%r11,%r12
    .   mtctr   %r12
    .   bctr
@@ -2863,7 +2863,7 @@ must_be_dyn_reloc (struct bfd_link_info *info,
    .   lis     %r11,(xxx-1f)@highesta34
    .   ori     %r11,%r11,(xxx-1f)@highera34
    .   sldi    %r11,%r11,34
-   . 1: paddi  %r12,xxx@pcrel
+   . 1: pla    %r12,xxx@pcrel
    .   ldx     %r12,%r11,%r12
    .   mtctr   %r12
    .   bctr
@@ -7445,7 +7445,7 @@ ppc64_elf_inline_plt (struct bfd_link_info *info)
                        && !(r_type == R_PPC64_PLTCALL_NOTOC
                             && (((h ? h->other : sym->st_other)
                                  & STO_PPC64_LOCAL_MASK)
-                                != 1 << STO_PPC64_LOCAL_BIT)))
+                                > 1 << STO_PPC64_LOCAL_BIT)))
                      *tls_maskp &= ~PLT_KEEP;
                  }
              }
@@ -8191,7 +8191,7 @@ ok_lo_toc_insn (unsigned int insn, enum elf_ppc64_reloc_type r_type)
      pld ra,symbol@got@pcrel
      load/store rt,0(ra)
    or
-     paddi ra,symbol@pcrel
+     pla ra,symbol@pcrel
      load/store rt,0(ra)
    may be translated to
      pload/pstore rt,symbol@pcrel
@@ -8200,7 +8200,7 @@ ok_lo_toc_insn (unsigned int insn, enum elf_ppc64_reloc_type r_type)
    the prefix insn in *PINSN1 and a NOP in *PINSN2.
 
    On entry to this function, the linker has already determined that
-   the pld can be replaced with paddi: *PINSN1 is that paddi insn,
+   the pld can be replaced with pla: *PINSN1 is that pla insn,
    while *PINSN2 is the second instruction.  */
 
 static bfd_boolean
@@ -12897,7 +12897,7 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
                                   && code_sec->output_section != NULL
                                   && (((hash ? hash->elf.other : sym->st_other)
                                        & STO_PPC64_LOCAL_MASK)
-                                      != 1 << STO_PPC64_LOCAL_BIT)))
+                                      > 1 << STO_PPC64_LOCAL_BIT)))
                        stub_type = ppc_stub_long_branch_notoc;
                    }
                  else if (stub_type != ppc_stub_plt_call)
@@ -15056,7 +15056,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
                  || stub_entry->stub_type == ppc_stub_plt_branch_both)
              && (r_type != R_PPC64_REL24_NOTOC
                  || ((fdh ? fdh->elf.other : sym->st_other)
-                     & STO_PPC64_LOCAL_MASK) == 1 << STO_PPC64_LOCAL_BIT)
+                     & STO_PPC64_LOCAL_MASK) <= 1 << STO_PPC64_LOCAL_BIT)
              && (relocation + addend - from + max_br_offset
                  < 2 * max_br_offset))
            stub_entry = NULL;