PowerPC64 --plt-align

[platform/upstream/binutils.git] / bfd / elf32-rl78.c

diff --git a/bfd/elf32-rl78.c b/bfd/elf32-rl78.c
index 9124e0a..2a5ec99 100644 (file)
--- a/bfd/elf32-rl78.c
+++ b/bfd/elf32-rl78.c
@@ -2199,7 +2199,7 @@ rl78_elf_relax_section
         61 F3 EF ad    SKNH ; BR $rel8
        */
 
-      if (irel->r_addend & RL78_RELAXA_BRA)
+      if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
        {
          /* SKIP opcodes that skip non-branches will have a relax tag
             but no corresponding symbol to relax against; we just
@@ -2334,7 +2334,7 @@ rl78_elf_relax_section
 
        }
 
-      if (irel->r_addend & RL78_RELAXA_ADDR16)
+      if ((irel->r_addend &  RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16)
        {
          /*----------------------------------------------------------------------*/
          /* Some insns have both a 16-bit address operand and an 8-bit