#define CMSE_PREFIX "__acle_se_"
+#define CMSE_STUB_NAME ".gnu.sgstubs"
+
/* The name of the dynamic interpreter. This is put in the .interp
section. */
#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
};
+/* NOTE: [Thumb nop sequence]
+ When adding code that transitions from Thumb to Arm the instruction that
+ should be used for the alignment padding should be 0xe7fd (b .-2) instead of
+ a nop for performance reasons. */
+
/* ARM FDPIC PLT entry. */
/* The last 5 words contain PLT lazy fragment code and data. */
static const bfd_vma elf32_arm_fdpic_plt_entry [] =
0x0c00f240, /* movw ip, #0xNNNN */
0x0c00f2c0, /* movt ip, #0xNNNN */
0xf8dc44fc, /* add ip, pc */
- 0xbf00f000 /* ldr.w pc, [ip] */
- /* nop */
+ 0xe7fdf000 /* ldr.w pc, [ip] */
+ /* b .-2 */
};
/* The format of the first entry in the procedure linkage table
static const bfd_vma elf32_arm_plt_thumb_stub [] =
{
0x4778, /* bx pc */
- 0x46c0 /* nop */
+ 0xe7fd /* b .-2 */
};
/* The entries in a PLT when using a DLL-based target with multiple
int reloc_addend;
} insn_sequence;
+/* See note [Thumb nop sequence] when adding a veneer. */
+
/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
to reach the stub if necessary. */
static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
{
THUMB16_INSN (0x4778), /* bx pc */
- THUMB16_INSN (0x46c0), /* nop */
+ THUMB16_INSN (0xe7fd), /* b .-2 */
ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
ARM_INSN (0xe12fff1c), /* bx ip */
DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
{
THUMB16_INSN (0x4778), /* bx pc */
- THUMB16_INSN (0x46c0), /* nop */
+ THUMB16_INSN (0xe7fd), /* b .-2 */
ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
};
static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
{
THUMB16_INSN (0x4778), /* bx pc */
- THUMB16_INSN (0x46c0), /* nop */
+ THUMB16_INSN (0xe7fd), /* b .-2 */
ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
};
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
{
THUMB16_INSN (0x4778), /* bx pc */
- THUMB16_INSN (0x46c0), /* nop */
+ THUMB16_INSN (0xe7fd), /* b .-2 */
ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
{
THUMB16_INSN (0x4778), /* bx pc */
- THUMB16_INSN (0x46c0), /* nop */
+ THUMB16_INSN (0xe7fd), /* b .-2 */
ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
ARM_INSN (0xe12fff1c), /* bx ip */
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
{
THUMB16_INSN (0x4778), /* bx pc */
- THUMB16_INSN (0x46c0), /* nop */
+ THUMB16_INSN (0xe7fd), /* b .-2 */
ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
ARM_INSN (0xe081f00f), /* add pc, r1, pc */
DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
if ((input_section->flags & SEC_CODE) == 0)
return NULL;
+ /* If the input section is the CMSE stubs one and it needs a long
+ branch stub to reach it's final destination, give up with an
+ error message: this is not supported. See PR ld/24709. */
+ if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen(CMSE_STUB_NAME)))
+ {
+ bfd *output_bfd = htab->obfd;
+ asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
+
+ _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
+ "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
+ CMSE_STUB_NAME,
+ (uint64_t)out_sec->output_section->vma
+ + out_sec->output_offset,
+ (uint64_t)sym_sec->output_section->vma
+ + sym_sec->output_offset
+ + h->root.root.u.def.value);
+ /* Exit, rather than leave incompletely processed
+ relocations. */
+ xexit(1);
+ }
+
/* If this input section is part of a group of sections sharing one
stub section, then use the id of the first section in the group.
Stub names need to include a section id, as there may well be
switch (stub_type)
{
case arm_stub_cmse_branch_thumb_only:
- return ".gnu.sgstubs";
+ return CMSE_STUB_NAME;
default:
BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
eadi = get_arm_elf_section_data (i);
edit_list = eadi->u.exidx.unwind_edit_list;
edit_tail = eadi->u.exidx.unwind_edit_tail;
- offset = o->vma + i->output_offset;
+ offset = i->output_offset;
if (eadi->elf.rel.hdr &&
eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
struct elf_link_hash_entry **sym_hashes;
struct elf32_arm_link_hash_entry *cmse_hash;
bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
+ bfd_boolean debug_sec_need_to_be_marked = FALSE;
+ asection *isec;
_bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
if (!cmse_sec->gc_mark
&& !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
return FALSE;
+ /* The debug sections related to these secure entry
+ functions are marked on enabling below flag. */
+ debug_sec_need_to_be_marked = TRUE;
}
}
+
+ if (debug_sec_need_to_be_marked)
+ {
+ /* Looping over all the sections of the object file containing
+ Armv8-M secure entry functions and marking all the debug
+ sections. */
+ for (isec = sub->sections; isec != NULL; isec = isec->next)
+ {
+ /* If not a debug sections, skip it. */
+ if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
+ isec->gc_mark = 1 ;
+ }
+ debug_sec_need_to_be_marked = FALSE;
+ }
}
}
first_bfd_browse = FALSE;
if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
filename_ptr, functionname_ptr,
line_ptr, discriminator_ptr,
- dwarf_debug_sections, 0,
+ dwarf_debug_sections,
& elf_tdata (abfd)->dwarf2_find_line_info))
{
if (!*functionname_ptr)
}
static void
-elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
+arm_final_write_processing (bfd *abfd)
{
bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
}
+static bfd_boolean
+elf32_arm_final_write_processing (bfd *abfd)
+{
+ arm_final_write_processing (abfd);
+ return _bfd_elf_final_write_processing (abfd);
+}
+
/* Return TRUE if this is an unwinding table entry. */
static bfd_boolean
&& nacl_modify_segment_map (abfd, info));
}
-static void
-elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
+static bfd_boolean
+elf32_arm_nacl_final_write_processing (bfd *abfd)
{
- elf32_arm_final_write_processing (abfd, linker);
- nacl_final_write_processing (abfd, linker);
+ arm_final_write_processing (abfd);
+ return nacl_final_write_processing (abfd);
}
static bfd_vma
return ret;
}
-static void
-elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
+static bfd_boolean
+elf32_arm_vxworks_final_write_processing (bfd *abfd)
{
- elf32_arm_final_write_processing (abfd, linker);
- elf_vxworks_final_write_processing (abfd, linker);
+ arm_final_write_processing (abfd);
+ return elf_vxworks_final_write_processing (abfd);
}
#undef elf32_bed