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[external/binutils.git] / bfd / ChangeLog

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+2019-08-24  Alan Modra  <amodra@gmail.com>
+
+       * elf64-ppc.c (ppc64_elf_edit_toc): Exclude undefined weak
+       symbols from GOT optimisation.
+
+2019-08-23  Stafford Horne  <shorne@gmail.com>
+
+       * elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Use correct value for
+       PLT GOT entries.
+
+2019-08-23  Nick Clifton  <nickc@redhat.com>
+
+       PR 24456
+       * elf.c (bfd_section_from_shdr): Issue an informative warning
+       message and continue processing other sections after encountering
+       a reloc section for a section which already has other relocs
+       associated with it.
+
+2019-08-23  Alan Modra  <amodra@gmail.com>
+
+       PR 24933
+       * elfxx-x86.c (_bfd_x86_elf_get_synthetic_symtab): Don't exit
+       on error without freeing plts[] contents.
+
+2019-08-22  Dennis Zhang  <dennis.zhang@arm.com>
+
+       * cpu-arm.c: New entries for Cortex-M35P, Cortex-A77, Cortex-A76AE.
+
+2019-08-22  Nick Clifton  <nickc@redhat.com>
+
+       PR 24922
+       * pei-x86_64.c (pex64_xdata_print_uwd_codes): Add checks before
+       reading data from extra records.
+
+2019-08-22  Tamar Christina  <tamar.christina@arm.com>
+
+       PR ld/24601
+       * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS.
+       Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation.
+       * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it.
+       * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning
+       for weak TLS.
+
+2019-08-22  Alan Modra  <amodra@gmail.com>
+
+       * elf32-arm.c (cmse_scan): Don't use ARM_GET_SYM_CMSE_SPCL,
+       instead recognize CMSE_PREFIX in symbol name.
+       (elf32_arm_gc_mark_extra_sections): Likewise.
+       (elf32_arm_filter_cmse_symbols): Don't test ARM_GET_SYM_CMSE_SPCL.
+       (elf32_arm_swap_symbol_in): Don't invoke ARM_SET_SYM_CMSE_SPCL.
+
+2019-08-20  Dennis Zhang  <dennis.zhang@arm.com>
+
+       * cpu-aarch64.c: New entries for Cortex-A34, Cortex-A65,
+        Cortex-A77, cortex-A65AE, and Cortex-A76AE.
+
+2019-08-20  Tamar Christina  <tamar.christina@arm.com>
+
+       * elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub,
+       elf32_arm_stub_long_branch_v4t_thumb_thumb,
+       elf32_arm_stub_long_branch_v4t_thumb_arm,
+       elf32_arm_stub_short_branch_v4t_thumb_arm,
+       elf32_arm_stub_long_branch_v4t_thumb_arm_pic,
+       elf32_arm_stub_long_branch_v4t_thumb_thumb_pic,
+       elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to
+       previous instruction.
+
+2019-08-19  Tom Tromey  <tromey@adacore.com>
+
+       * dwarf2.c (_bfd_dwarf2_find_symbol_bias): Create hash table
+       holding symbols.
+
+2019-08-19  Alan Modra  <amodra@gmail.com>
+
+       * elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename has_gotrel
+       to has_optrel.
+       (struct _ppc64_elf_section_data): Likewise.
+       (ppc64_elf_check_relocs): Set has_optrel for more relocs.
+       (ppc64_elf_edit_toc): Do ha/lo insn checks in GOT loop rather
+       than TOC loop.  Check PLT16 insns too.
+
+2019-08-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/24905
+       * elf64-x86-64.c (elf_x86_64_check_relocs): Move PIC check for
+       PC-relative relocations back to ...
+       (elf_x86_64_relocate_section): Here.
+
+2019-08-16  Martin Liska  <mliska@suse.cz>
+
+       PR ld/24912
+       * elflink.c: Report error only for not relocatable.
+       * linker.c (_bfd_generic_link_add_one_symbol): Do not handle
+       here lto_slim_object as it's handled in caller.
+
 2019-08-16  Alan Modra  <amodra@gmail.com>
 
        * elf32-ppc.c (ppc_elf_relocate_section): Optimize unaligned relocs.