Prepare for 64bit relocation addresses

[platform/upstream/intel-gpu-tools.git] / benchmarks / intel_upload_blit_large.c

diff --git a/benchmarks/intel_upload_blit_large.c b/benchmarks/intel_upload_blit_large.c
index aec19c4..d9287ab 100644 (file)
--- a/benchmarks/intel_upload_blit_large.c
+++ b/benchmarks/intel_upload_blit_large.c
@@ -40,6 +40,8 @@
  * Additionally, those applications should be rendering at the screen refresh
  * rate, while this test has no limits, and so can get itself into the
  * working set larger than aperture size performance disaster.
+ *
+ * The current workload doing this path is pixmap upload for non-KMS.
  */
 
 #include <stdlib.h>
@@ -51,11 +53,15 @@
 #include <errno.h>
 #include <sys/stat.h>
 #include <sys/time.h>
-#include "drm.h"
-#include "i915_drm.h"
+
+#include <drm.h>
+#include <i915_drm.h>
+
 #include "drmtest.h"
 #include "intel_bufmgr.h"
 #include "intel_batchbuffer.h"
+#include "intel_io.h"
+#include "intel_chipset.h"
 
 #define OBJECT_WIDTH   1280
 #define OBJECT_HEIGHT  720
@@ -91,10 +97,7 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
        drm_intel_bo_subdata(src_bo, 0, sizeof(data), data);
 
        /* Render the junk to the dst. */
-       BEGIN_BATCH(8);
-       OUT_BATCH(XY_SRC_COPY_BLT_CMD |
-                 XY_SRC_COPY_BLT_WRITE_ALPHA |
-                 XY_SRC_COPY_BLT_WRITE_RGB);
+       BLIT_COPY_BATCH_START(batch->devid, 0);
        OUT_BATCH((3 << 24) | /* 32 bits */
                  (0xcc << 16) | /* copy ROP */
                  (width * 4) /* dst pitch */);
@@ -126,7 +129,7 @@ int main(int argc, char **argv)
        bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
        drm_intel_bufmgr_gem_enable_reuse(bufmgr);
 
-       batch = intel_batchbuffer_alloc(bufmgr);
+       batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
 
        dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);