GBE: fix one double related bugs for post register scheduling.

[contrib/beignet.git] / backend / src / backend / gen8_encoder.cpp

diff --git a/backend/src/backend/gen8_encoder.cpp b/backend/src/backend/gen8_encoder.cpp
index 4ca900d..ae2d4eb 100644 (file)
--- a/backend/src/backend/gen8_encoder.cpp
+++ b/backend/src/backend/gen8_encoder.cpp
@@ -96,6 +96,14 @@ namespace gbe
     gen8_insn->bits3.gen7_typed_rw.slot = 1;
   }
 
+  void Gen8Encoder::F16TO32(GenRegister dest, GenRegister src0) {
+    MOV(GenRegister::retype(dest, GEN_TYPE_F), GenRegister::retype(src0, GEN_TYPE_HF));
+  }
+
+  void Gen8Encoder::F32TO16(GenRegister dest, GenRegister src0) {
+    MOV(GenRegister::retype(dest, GEN_TYPE_HF), GenRegister::retype(src0, GEN_TYPE_F));
+  }
+
   void Gen8Encoder::ATOMIC(GenRegister dst, uint32_t function, GenRegister src, uint32_t bti, uint32_t srcNum) {
     GenNativeInstruction *insn = this->next(GEN_OPCODE_SEND);
     Gen8NativeInstruction *gen8_insn = &insn->gen8_insn;
@@ -211,8 +219,9 @@ namespace gbe
     pop();
   }
 
-  void Gen8Encoder::MOV_DF(GenRegister dest, GenRegister src0, GenRegister r) {
+  void Gen8Encoder::MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp) {
     GBE_ASSERT((src0.type == GEN_TYPE_F && dest.isdf()) || (src0.isdf() && dest.type == GEN_TYPE_F));
+    GenRegister r = GenRegister::retype(tmp, GEN_TYPE_F);
     int w = curr.execWidth;
     GenRegister r0;
     r0 = GenRegister::h2(r);