Merge tag 'mpx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/daveh...

[platform/kernel/linux-rpi.git] / arch / x86 / kernel / cpu / intel.c

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 4a90080..be82cd5 100644 (file)
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -32,41 +32,6 @@
 #endif
 
 /*
- * Just in case our CPU detection goes bad, or you have a weird system,
- * allow a way to override the automatic disabling of MPX.
- */
-static int forcempx;
-
-static int __init forcempx_setup(char *__unused)
-{
-       forcempx = 1;
-
-       return 1;
-}
-__setup("intel-skd-046-workaround=disable", forcempx_setup);
-
-void check_mpx_erratum(struct cpuinfo_x86 *c)
-{
-       if (forcempx)
-               return;
-       /*
-        * Turn off the MPX feature on CPUs where SMEP is not
-        * available or disabled.
-        *
-        * Works around Intel Erratum SKD046: "Branch Instructions
-        * May Initialize MPX Bound Registers Incorrectly".
-        *
-        * This might falsely disable MPX on systems without
-        * SMEP, like Atom processors without SMEP.  But there
-        * is no such hardware known at the moment.
-        */
-       if (cpu_has(c, X86_FEATURE_MPX) && !cpu_has(c, X86_FEATURE_SMEP)) {
-               setup_clear_cpu_cap(X86_FEATURE_MPX);
-               pr_warn("x86/mpx: Disabling MPX since SMEP not present\n");
-       }
-}
-
-/*
  * Processors which have self-snooping capability can handle conflicting
  * memory type across CPUs by snooping its own cache. However, there exists
  * CPU models in which having conflicting memory types still leads to
@@ -330,7 +295,6 @@ static void early_init_intel(struct cpuinfo_x86 *c)
                        c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);
        }
 
-       check_mpx_erratum(c);
        check_memory_type_self_snoop_errata(c);
 
        /*
@@ -494,52 +458,6 @@ static void srat_detect_node(struct cpuinfo_x86 *c)
 #endif
 }
 
-static void detect_vmx_virtcap(struct cpuinfo_x86 *c)
-{
-       /* Intel VMX MSR indicated features */
-#define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW   0x00200000
-#define X86_VMX_FEATURE_PROC_CTLS_VNMI         0x00400000
-#define X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS     0x80000000
-#define X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC   0x00000001
-#define X86_VMX_FEATURE_PROC_CTLS2_EPT         0x00000002
-#define X86_VMX_FEATURE_PROC_CTLS2_VPID                0x00000020
-#define x86_VMX_FEATURE_EPT_CAP_AD             0x00200000
-
-       u32 vmx_msr_low, vmx_msr_high, msr_ctl, msr_ctl2;
-       u32 msr_vpid_cap, msr_ept_cap;
-
-       clear_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
-       clear_cpu_cap(c, X86_FEATURE_VNMI);
-       clear_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
-       clear_cpu_cap(c, X86_FEATURE_EPT);
-       clear_cpu_cap(c, X86_FEATURE_VPID);
-       clear_cpu_cap(c, X86_FEATURE_EPT_AD);
-
-       rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high);
-       msr_ctl = vmx_msr_high | vmx_msr_low;
-       if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW)
-               set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
-       if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_VNMI)
-               set_cpu_cap(c, X86_FEATURE_VNMI);
-       if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS) {
-               rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
-                     vmx_msr_low, vmx_msr_high);
-               msr_ctl2 = vmx_msr_high | vmx_msr_low;
-               if ((msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC) &&
-                   (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW))
-                       set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
-               if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_EPT) {
-                       set_cpu_cap(c, X86_FEATURE_EPT);
-                       rdmsr(MSR_IA32_VMX_EPT_VPID_CAP,
-                             msr_ept_cap, msr_vpid_cap);
-                       if (msr_ept_cap & x86_VMX_FEATURE_EPT_CAP_AD)
-                               set_cpu_cap(c, X86_FEATURE_EPT_AD);
-               }
-               if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VPID)
-                       set_cpu_cap(c, X86_FEATURE_VPID);
-       }
-}
-
 #define MSR_IA32_TME_ACTIVATE          0x982
 
 /* Helpers to access TME_ACTIVATE MSR */
@@ -755,8 +673,7 @@ static void init_intel(struct cpuinfo_x86 *c)
        /* Work around errata */
        srat_detect_node(c);
 
-       if (cpu_has(c, X86_FEATURE_VMX))
-               detect_vmx_virtcap(c);
+       init_ia32_feat_ctl(c);
 
        if (cpu_has(c, X86_FEATURE_TME))
                detect_tme(c);