Merge branch 'x86/core' into x86/mce2
[platform/kernel/linux-starfive.git] / arch / x86 / kernel / apic / apic.c
index f9cecdf..30909a2 100644 (file)
@@ -46,6 +46,7 @@
 #include <asm/idle.h>
 #include <asm/mtrr.h>
 #include <asm/smp.h>
+#include <asm/mce.h>
 
 unsigned int num_processors;
 
@@ -842,6 +843,14 @@ void clear_local_APIC(void)
                apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED);
        }
 #endif
+#ifdef CONFIG_X86_MCE_INTEL
+       if (maxlvt >= 6) {
+               v = apic_read(APIC_LVTCMCI);
+               if (!(v & APIC_LVT_MASKED))
+                       apic_write(APIC_LVTCMCI, v | APIC_LVT_MASKED);
+       }
+#endif
+
        /*
         * Clean APIC state for other OSs:
         */
@@ -1241,6 +1250,12 @@ void __cpuinit setup_local_APIC(void)
        apic_write(APIC_LVT1, value);
 
        preempt_enable();
+
+#ifdef CONFIG_X86_MCE_INTEL
+       /* Recheck CMCI information after local APIC is up on CPU #0 */
+       if (smp_processor_id() == 0)
+               cmci_recheck();
+#endif
 }
 
 void __cpuinit end_local_APIC_setup(void)