x86: ACPI: cstate: Optimize C3 entry on AMD CPUs

[platform/kernel/linux-rpi.git] / arch / x86 / kernel / acpi / cstate.c

diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index 7de599e..7945eae 100644 (file)
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -79,6 +79,21 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
                 */
                flags->bm_control = 0;
        }
+       if (c->x86_vendor == X86_VENDOR_AMD && c->x86 >= 0x17) {
+               /*
+                * For all AMD Zen or newer CPUs that support C3, caches
+                * should not be flushed by software while entering C3
+                * type state. Set bm->check to 1 so that kernel doesn't
+                * need to execute cache flush operation.
+                */
+               flags->bm_check = 1;
+               /*
+                * In current AMD C state implementation ARB_DIS is no longer
+                * used. So set bm_control to zero to indicate ARB_DIS is not
+                * required while entering C3 type state.
+                */
+               flags->bm_control = 0;
+       }
 }
 EXPORT_SYMBOL(acpi_processor_power_init_bm_check);