KVM: x86/pmu: fix masking logic for MSR_CORE_PERF_GLOBAL_CTRL

[platform/kernel/linux-starfive.git] / arch / x86 / events / intel / core.c

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index fa355d3..bc4fcf0 100644 (file)
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4062,12 +4062,17 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data)
        u64 pebs_mask = cpuc->pebs_enabled & x86_pmu.pebs_capable;
        int global_ctrl, pebs_enable;
 
+       /*
+        * In addition to obeying exclude_guest/exclude_host, remove bits being
+        * used for PEBS when running a guest, because PEBS writes to virtual
+        * addresses (not physical addresses).
+        */
        *nr = 0;
        global_ctrl = (*nr)++;
        arr[global_ctrl] = (struct perf_guest_switch_msr){
                .msr = MSR_CORE_PERF_GLOBAL_CTRL,
                .host = intel_ctrl & ~cpuc->intel_ctrl_guest_mask,
-               .guest = intel_ctrl & (~cpuc->intel_ctrl_host_mask | ~pebs_mask),
+               .guest = intel_ctrl & ~cpuc->intel_ctrl_host_mask & ~pebs_mask,
        };
 
        if (!x86_pmu.pebs)