/include/ "serial.dtsi"
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
-/include/ "tsc_timer.dtsi"
+
+#include "tsc_timer.dtsi"
+#include "smbios.dtsi"
/ {
model = "Intel Bayley Bay";
compatible = "pci-x86";
#address-cells = <3>;
#size-cells = <2>;
- u-boot,dm-pre-reloc;
+ bootph-all;
ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
0x01000000 0x0 0x2000 0x2000 0 0xe000>;
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
+ m25p,fast-read;
compatible = "winbond,w25q64dw",
"jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
- reg = <0x006e0000 0x00010000>;
+ reg = <0x005e0000 0x00010000>;
};
};
};
gpioa {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0 0x20>;
bank-name = "A";
use-lvl-write-cache;
gpiob {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x20 0x20>;
bank-name = "B";
use-lvl-write-cache;
gpioc {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x40 0x20>;
bank-name = "C";
use-lvl-write-cache;
gpiod {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x60 0x20>;
bank-name = "D";
use-lvl-write-cache;
gpioe {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x80 0x20>;
bank-name = "E";
use-lvl-write-cache;
gpiof {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0xA0 0x20>;
bank-name = "F";
use-lvl-write-cache;