Merge branch 'master' into next

[platform/kernel/u-boot.git] / arch / x86 / dts / bayleybay.dts

diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 1ae058d..59403f4 100644 (file)
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -1,20 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /dts-v1/;
 
+#include <asm/arch-baytrail/fsp/fsp_configs.h>
 #include <dt-bindings/gpio/x86-gpio.h>
 #include <dt-bindings/interrupt-router/intel-irq.h>
 
 /include/ "skeleton.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
-/include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
+
+#include "tsc_timer.dtsi"
+#include "smbios.dtsi"
 
 / {
        model = "Intel Bayley Bay";
@@ -90,7 +92,7 @@
                compatible = "pci-x86";
                #address-cells = <3>;
                #size-cells = <2>;
-               u-boot,dm-pre-reloc;
+               bootph-all;
                ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
                          0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
                          0x01000000 0x0 0x2000 0x2000 0 0xe000>;
@@ -174,19 +176,20 @@
                                        #address-cells = <1>;
                                        #size-cells = <1>;
                                        reg = <0>;
+                                       m25p,fast-read;
                                        compatible = "winbond,w25q64dw",
-                                               "spi-flash";
+                                               "jedec,spi-nor";
                                        memory-map = <0xff800000 0x00800000>;
                                        rw-mrc-cache {
                                                label = "rw-mrc-cache";
-                                               reg = <0x006e0000 0x00010000>;
+                                               reg = <0x005e0000 0x00010000>;
                                        };
                                };
                        };
 
                        gpioa {
                                compatible = "intel,ich6-gpio";
-                               u-boot,dm-pre-reloc;
+                               bootph-all;
                                reg = <0 0x20>;
                                bank-name = "A";
                                use-lvl-write-cache;
@@ -194,7 +197,7 @@
 
                        gpiob {
                                compatible = "intel,ich6-gpio";
-                               u-boot,dm-pre-reloc;
+                               bootph-all;
                                reg = <0x20 0x20>;
                                bank-name = "B";
                                use-lvl-write-cache;
@@ -202,7 +205,7 @@
 
                        gpioc {
                                compatible = "intel,ich6-gpio";
-                               u-boot,dm-pre-reloc;
+                               bootph-all;
                                reg = <0x40 0x20>;
                                bank-name = "C";
                                use-lvl-write-cache;
@@ -210,7 +213,7 @@
 
                        gpiod {
                                compatible = "intel,ich6-gpio";
-                               u-boot,dm-pre-reloc;
+                               bootph-all;
                                reg = <0x60 0x20>;
                                bank-name = "D";
                                use-lvl-write-cache;
@@ -218,7 +221,7 @@
 
                        gpioe {
                                compatible = "intel,ich6-gpio";
-                               u-boot,dm-pre-reloc;
+                               bootph-all;
                                reg = <0x80 0x20>;
                                bank-name = "E";
                                use-lvl-write-cache;
@@ -226,7 +229,7 @@
 
                        gpiof {
                                compatible = "intel,ich6-gpio";
-                               u-boot,dm-pre-reloc;
+                               bootph-all;
                                reg = <0xA0 0x20>;
                                bank-name = "F";
                                use-lvl-write-cache;
@@ -236,19 +239,19 @@
 
        fsp {
                compatible = "intel,baytrail-fsp";
-               fsp,mrc-init-tseg-size = <0>;
-               fsp,mrc-init-mmio-size = <0x800>;
+               fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
+               fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
                fsp,mrc-init-spd-addr1 = <0xa0>;
                fsp,mrc-init-spd-addr2 = <0xa2>;
-               fsp,emmc-boot-mode = <1>;
+               fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
                fsp,enable-sdio;
                fsp,enable-sdcard;
                fsp,enable-hsuart1;
                fsp,enable-spi;
                fsp,enable-sata;
-               fsp,sata-mode = <1>;
-               fsp,enable-lpe;
-               fsp,lpss-sio-enable-pci-mode;
+               fsp,sata-mode = <SATA_MODE_AHCI>;
+               fsp,lpe-mode = <LPE_MODE_PCI>;
+               fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
                fsp,enable-dma0;
                fsp,enable-dma1;
                fsp,enable-i2c0;
@@ -260,13 +263,11 @@
                fsp,enable-i2c6;
                fsp,enable-pwm0;
                fsp,enable-pwm1;
-               fsp,igd-dvmt50-pre-alloc = <2>;
-               fsp,aperture-size = <2>;
-               fsp,gtt-size = <2>;
-               fsp,serial-debug-port-address = <0x3f8>;
-               fsp,serial-debug-port-type = <1>;
-               fsp,scc-enable-pci-mode;
-               fsp,os-selection = <4>;
+               fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
+               fsp,aperture-size = <APERTURE_SIZE_256MB>;
+               fsp,gtt-size = <GTT_SIZE_2MB>;
+               fsp,scc-mode = <SCC_MODE_PCI>;
+               fsp,os-selection = <OS_SELECTION_LINUX>;
                fsp,emmc45-ddr50-enabled;
                fsp,emmc45-retune-timer-value = <8>;
                fsp,enable-igd;