x86: Allow disabling IGD on Intel Queensbay

[platform/kernel/u-boot.git] / arch / x86 / cpu / queensbay / tnc.c

diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 873de7b..0c02a44 100644 (file)
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -23,9 +23,18 @@ static void unprotect_spi_flash(void)
        x86_pci_write_config32(TNC_LPC, 0xd8, bc);
 }
 
+static void __maybe_unused disable_igd(void)
+{
+       u32 gc;
+
+       gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
+       gc &= ~GMS_MASK;
+       gc |= VGA_DISABLE;
+       x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
+}
+
 int arch_cpu_init(void)
 {
-       struct pci_controller *hose;
        int ret;
 
        post_code(POST_CPU_INIT);
@@ -37,11 +46,14 @@ int arch_cpu_init(void)
        if (ret)
                return ret;
 
-       ret = pci_early_init_hose(&hose);
-       if (ret)
-               return ret;
+       return 0;
+}
 
-       unprotect_spi_flash();
+int arch_early_init_r(void)
+{
+#ifdef CONFIG_DISABLE_IGD
+       disable_igd();
+#endif
 
        return 0;
 }
@@ -69,22 +81,23 @@ void cpu_irq_init(void)
         * Route TunnelCreek PCI device interrupt pin to PIRQ
         *
         * Since PCIe downstream ports received INTx are routed to PIRQ
-        * A/B/C/D directly and not configurable, we route internal PCI
-        * device's INTx to PIRQ E/F/G/H.
+        * A/B/C/D directly and not configurable, we have to route PCIe
+        * root ports' INTx to PIRQ A/B/C/D as well. For other devices
+        * on TunneCreek, route them to PIRQ E/F/G/H.
         */
        writew(PIRQE, &rcba->d02ir);
        writew(PIRQF, &rcba->d03ir);
        writew(PIRQG, &rcba->d27ir);
        writew(PIRQH, &rcba->d31ir);
-       writew(PIRQE, &rcba->d23ir);
-       writew(PIRQF, &rcba->d24ir);
-       writew(PIRQG, &rcba->d25ir);
-       writew(PIRQH, &rcba->d26ir);
+       writew(PIRQA, &rcba->d23ir);
+       writew(PIRQB, &rcba->d24ir);
+       writew(PIRQC, &rcba->d25ir);
+       writew(PIRQD, &rcba->d26ir);
 }
 
 int arch_misc_init(void)
 {
-       pirq_init();
+       unprotect_spi_flash();
 
-       return 0;
+       return pirq_init();
 }