+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011 The Chromium OS Authors.
* (C) Copyright 2008
* Graeme Russ, graeme.russ@gmail.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <cpu_func.h>
#include <fdtdec.h>
-#include <netdev.h>
+#include <init.h>
+#include <usb.h>
+#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/msr.h>
#include <asm/mtrr.h>
-#include <asm/arch/sysinfo.h>
+#include <asm/cb_sysinfo.h>
#include <asm/arch/timestamp.h>
-
-DECLARE_GLOBAL_DATA_PTR;
+#include <dm/ofnode.h>
int arch_cpu_init(void)
{
timestamp_init();
- return x86_cpu_init_f();
+ return IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() :
+ x86_cpu_init_f();
}
-int board_early_init_f(void)
+int checkcpu(void)
{
return 0;
}
return default_print_cpuinfo();
}
-int last_stage_init(void)
-{
- if (gd->flags & GD_FLG_COLD_BOOT)
- timestamp_add_to_bootstage();
-
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- return pci_eth_init(bis);
-}
-
-void board_final_cleanup(void)
+static void board_final_init(void)
{
/*
* Un-cache the ROM so the kernel has one
if (top_type == MTRR_TYPE_WRPROT) {
struct mtrr_state state;
- mtrr_open(&state);
+ mtrr_open(&state, true);
wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0);
wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0);
- mtrr_close(&state);
+ mtrr_close(&state, true);
}
- if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
+ if (!ofnode_conf_read_bool("u-boot,no-apm-finalize")) {
/*
* Issue SMI to coreboot to lock down ME and registers
* when allowed via device tree
}
}
-int misc_init_r(void)
+int last_stage_init(void)
{
+ /* start usb so that usb keyboard can be used as input device */
+ if (CONFIG_IS_ENABLED(USB_KEYBOARD))
+ usb_init();
+
+ board_final_init();
+
return 0;
}