riscv: Clear pending interrupts before enabling IPIs

[platform/kernel/u-boot.git] / arch / riscv / cpu / start.S

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 5f1c220..f408e41 100644 (file)
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -65,6 +65,8 @@ _start:
 #else
        li      t0, SIE_SSIE
 #endif
+       /* Clear any pending IPIs */
+       csrc    MODE_PREFIX(ip), t0
        csrs    MODE_PREFIX(ie), t0
 #endif