Merge tag 'u-boot-imx-20211020' of https://source.denx.de/u-boot/custodians/u-boot-imx

[platform/kernel/u-boot.git] / arch / riscv / cpu / start.S

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index eb85253..76850ec 100644 (file)
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -43,7 +43,10 @@ _start:
        csrr    a0, CSR_MHARTID
 #endif
 
-       /* save hart id and dtb pointer */
+       /*
+        * Save hart id and dtb pointer. The thread pointer register is not
+        * modified by C code. It is used by secondary_hart_loop.
+        */
        mv      tp, a0
        mv      s1, a1
 
@@ -54,10 +57,18 @@ _start:
         */
        mv      gp, zero
 
+       /*
+        * Set the trap handler. This must happen after initializing gp because
+        * the handler may use it.
+        */
        la      t0, trap_entry
        csrw    MODE_PREFIX(tvec), t0
 
-       /* mask all interrupts */
+       /*
+        * Mask all interrupts. Interrupts are disabled globally (in m/sstatus)
+        * for U-Boot, but we will need to read m/sip to determine if we get an
+        * IPI
+        */
        csrw    MODE_PREFIX(ie), zero
 
 #if CONFIG_IS_ENABLED(SMP)
@@ -106,13 +117,17 @@ call_board_init_f_0:
        mv      sp, a0
 #endif
 
+       /* Configure proprietary settings and customized CSRs of harts */
+call_harts_early_init:
+       jal     harts_early_init
+
 #ifndef CONFIG_XIP
        /*
         * Pick hart to initialize global data and run U-Boot. The other harts
         * wait for initialization to complete.
         */
        la      t0, hart_lottery
-       li      s2, 1
+       li      t1, 1
        amoswap.w s2, t1, 0(t0)
        bnez    s2, wait_for_gd_init
 #else
@@ -127,11 +142,6 @@ call_board_init_f_0:
        bnez    tp, secondary_hart_loop
 #endif
 
-#ifdef CONFIG_OF_PRIOR_STAGE
-       la      t0, prior_stage_fdt_address
-       SREG    s1, 0(t0)
-#endif
-
        jal     board_init_f_init_reserve
 
        SREG    s1, GD_FIRMWARE_FDT_ADDR(gp)
@@ -412,6 +422,10 @@ secondary_hart_relocate:
        mv      gp, a2
 #endif
 
+/*
+ * Interrupts are disabled globally, but they can still be read from m/sip. The
+ * wfi function will wake us up if we get an IPI, even if we do not trap.
+ */
 secondary_hart_loop:
        wfi