RISCV: config: tizen_*: Enable ZRAM support
[platform/kernel/linux-starfive.git] / arch / riscv / configs / tizen_qemu_defconfig
index 6135f95..786bb3a 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_PCI_HOST_GENERIC=y
 CONFIG_PCIE_XILINX=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
@@ -122,6 +123,8 @@ CONFIG_9P_FS=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_SMACK=y
 CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y
+CONFIG_CRYPTO_LZ4=y
+CONFIG_CRYPTO_ZSTD=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y