Merge branch 'CR_871_PWM_hal.feng' into 'jh7110_fpga_dev_5.15'

[platform/kernel/linux-starfive.git] / arch / riscv / boot / dts / starfive / jh7110.dtsi

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 410458a..db0049e 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -902,10 +902,11 @@
                        compatible = "starfive,pwm0";
                        reg = <0x0 0x120d0000 0x0 0x10000>;
                        reg-names = "control";
-                       clocks = <&pwmclk>;
-                       sifive,approx-period = <1000000>;
+                       clocks = <&clkgen JH7110_PWM_CLK_APB>;
+                       resets = <&rstgen RSTN_U0_PWM_8CH_APB>;
+                       starfive,approx-period = <2000000>;
                        #pwm-cells=<3>;
-                       sifive,npwm = <8>;
+                       starfive,npwm = <8>;
                        status = "disabled";
                };