Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

[platform/kernel/u-boot.git] / arch / riscv / Kconfig

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index b3d7fd8..691ed11 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -22,9 +22,14 @@ config TARGET_SIFIVE_UNLEASHED
 
 config TARGET_SIFIVE_UNMATCHED
        bool "Support SiFive Unmatched Board"
+       select SYS_CACHE_SHIFT_6
 
 config TARGET_SIPEED_MAIX
        bool "Support Sipeed Maix Board"
+       select SYS_CACHE_SHIFT_6
+
+config TARGET_OPENPITON_RISCV64
+       bool "Support RISC-V cores on OpenPiton SoC"
 
 endchoice
 
@@ -60,6 +65,7 @@ source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/unleashed/Kconfig"
 source "board/sifive/unmatched/Kconfig"
+source "board/openpiton/riscv64/Kconfig"
 source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below