Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

[platform/kernel/u-boot.git] / arch / riscv / Kconfig

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 63665d2..691ed11 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,8 +20,16 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_UNLEASHED
        bool "Support SiFive Unleashed Board"
 
+config TARGET_SIFIVE_UNMATCHED
+       bool "Support SiFive Unmatched Board"
+       select SYS_CACHE_SHIFT_6
+
 config TARGET_SIPEED_MAIX
        bool "Support Sipeed Maix Board"
+       select SYS_CACHE_SHIFT_6
+
+config TARGET_OPENPITON_RISCV64
+       bool "Support RISC-V cores on OpenPiton SoC"
 
 endchoice
 
@@ -56,11 +64,14 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/unleashed/Kconfig"
+source "board/sifive/unmatched/Kconfig"
+source "board/openpiton/riscv64/Kconfig"
 source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
 source "arch/riscv/cpu/fu540/Kconfig"
+source "arch/riscv/cpu/fu740/Kconfig"
 source "arch/riscv/cpu/generic/Kconfig"
 
 # architecture-specific options below