riscv: Move virtio scan to board_late_init()

[platform/kernel/u-boot.git] / arch / riscv / Kconfig

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 867cbcb..1a39cb4 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -16,6 +16,7 @@ config TARGET_MICROCHIP_ICICLE
 
 config TARGET_QEMU_VIRT
        bool "Support QEMU Virt Board"
+       select BOARD_LATE_INIT
 
 config TARGET_SIFIVE_UNLEASHED
        bool "Support SiFive Unleashed Board"
@@ -26,6 +27,7 @@ config TARGET_SIFIVE_UNMATCHED
 
 config TARGET_STARFIVE_VISIONFIVE2
        bool "Support StarFive VisionFive2 Board"
+       select BOARD_LATE_INIT
 
 config TARGET_TH1520_LPI4A
        bool "Support Sipeed's TH1520 Lichee PI 4A Board"
@@ -64,6 +66,14 @@ config SPL_SYS_DCACHE_OFF
        help
          Do not enable data cache in SPL.
 
+config SPL_ZERO_MEM_BEFORE_USE
+       bool "Zero memory before use"
+       depends on SPL
+       default n
+       help
+         Zero stack/GD/malloc area in SPL before using them, this is needed for
+         Sifive core devices that uses L2 cache to store SPL.
+
 # board-specific options below
 source "board/AndesTech/ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"