-/*----------------------------------------------------------------------------+
-| This source code is dual-licensed. You may use it under the terms of
-| the GNU General Public License version 2, or under the license below.
-|
-| This source code has been made available to you by IBM on an AS-IS
-| basis. Anyone receiving this source is licensed under IBM
-| copyrights to use it in any way he or she deems fit, including
-| copying it, modifying it, compiling it, and redistributing it either
-| with or without modifications. No license under IBM patents or
-| patent applications is to be implied by the copyright license.
-|
-| Any user of this software should understand that IBM cannot provide
-| technical support for this software and will not be responsible for
-| any consequences resulting from the use of this software.
-|
-| Any person who transfers this source code or any derivative work
-| must include the IBM copyright notice, this paragraph, and the
-| preceding two paragraphs in the transferred software.
-|
-| COPYRIGHT I B M CORPORATION 1999
-| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
-+----------------------------------------------------------------------------*/
+/*
+ * SPDX-License-Identifier: GPL-2.0 IBM-pibs
+ */
#ifndef __PPC4XX_H__
#define __PPC4XX_H__
/*
* Include SoC specific headers
*/
-#if defined(CONFIG_405CR)
-#include <asm/ppc405cr.h>
-#endif
-
#if defined(CONFIG_405EP)
#include <asm/ppc405ep.h>
#endif
#endif
/*
- * Configure which SDRAM/DDR/DDR2 controller is equipped
- */
-// test-only: what to do with these???
-#if defined(CONFIG_AP1000) || defined(CONFIG_ML2)
-#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
-#endif
-
-/*
* Common registers for all SoC's
*/
/* DCR registers */
#define GPT0_DCT0 0x00000110
#define GPT0_DCIS 0x0000011C
-#if 0 // test-only
-/*
- * All PPC4xx share the same NS16550 UART(s). Only base addresses
- * may differ. We define here the integration of the common NS16550
- * driver for all PPC4xx SoC's. The board config header must specify
- * on which UART the console should be located via CONFIG_CONS_INDEX.
- */
-#if 0 /* test-only */
-#define CONFIG_SERIAL_MULTI
-#endif
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-#endif
-
#if defined(CONFIG_440)
#include <asm/ppc440.h>
#else
int ppc4xx_pci_sync_clock_config(u32 async);
+unsigned long get_OPB_freq(void);
+unsigned long get_PCI_freq(void);
+
+typedef PPC4xx_SYS_INFO sys_info_t;
+int ppc440spe_revB(void);
+void get_sys_info(sys_info_t *);
+
#endif /* __ASSEMBLY__ */
/* for multi-cpu support */