#ifndef _PPC_IO_H
#define _PPC_IO_H
-#include <linux/config.h>
#include <asm/byteorder.h>
#ifdef CONFIG_ADDR_MAP
+#include <asm/global_data.h>
#include <addr_map.h>
+
+DECLARE_GLOBAL_DATA_PTR;
#endif
#define SIO_CONFIG_RA 0x398
#define IO_SPACE_LIMIT ~0
-#define memset_io(a,b,c) memset((void *)(a),(b),(c))
-#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
-#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
+#define memset_io(a,b,c) memset((void __force *)(a),(b),(c))
+#define memcpy_fromio(a,b,c) memcpy((a),(void __force *)(b),(c))
+#define memcpy_toio(a,b,c) memcpy((void __force *)(a),(b),(c))
/*
* Enforce In-order Execution of I/O:
#define iobarrier_r() eieio()
#define iobarrier_w() eieio()
+#define mb() sync()
+#define isb() isync()
+
/*
* Non ordered and non-swapping "raw" accessors
*/
-#define __iomem
#define PCI_FIX_ADDR(addr) (addr)
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
* is actually performed (i.e. the data has come back) before we start
* executing any following instructions.
*/
-extern inline int in_8(const volatile unsigned char __iomem *addr)
+static inline u8 in_8(const volatile unsigned char __iomem *addr)
{
- int ret;
+ u8 ret;
__asm__ __volatile__(
"sync; lbz%U1%X1 %0,%1;\n"
return ret;
}
-extern inline void out_8(volatile unsigned char __iomem *addr, int val)
+static inline void out_8(volatile unsigned char __iomem *addr, u8 val)
{
- __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+ __asm__ __volatile__("sync;\n"
+ "stb%U0%X0 %1,%0;\n"
+ : "=m" (*addr)
+ : "r" (val));
}
-extern inline int in_le16(const volatile unsigned short __iomem *addr)
+static inline u16 in_le16(const volatile unsigned short __iomem *addr)
{
- int ret;
+ u16 ret;
__asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
"twi 0,%0,0;\n"
return ret;
}
-extern inline int in_be16(const volatile unsigned short __iomem *addr)
+static inline u16 in_be16(const volatile unsigned short __iomem *addr)
{
- int ret;
+ u16 ret;
__asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
"twi 0,%0,0;\n"
return ret;
}
-extern inline void out_le16(volatile unsigned short __iomem *addr, int val)
+static inline void out_le16(volatile unsigned short __iomem *addr, u16 val)
{
__asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
"r" (val), "r" (addr));
}
-extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
+static inline void out_be16(volatile unsigned short __iomem *addr, u16 val)
{
__asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
-extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
+static inline u32 in_le32(const volatile unsigned __iomem *addr)
{
- unsigned ret;
+ u32 ret;
__asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
"twi 0,%0,0;\n"
return ret;
}
-extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
+static inline u32 in_be32(const volatile unsigned __iomem *addr)
{
- unsigned ret;
+ u32 ret;
__asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
"twi 0,%0,0;\n"
return ret;
}
-extern inline void out_le32(volatile unsigned __iomem *addr, int val)
+static inline void out_le32(volatile unsigned __iomem *addr, u32 val)
{
__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
"r" (val), "r" (addr));
}
-extern inline void out_be32(volatile unsigned __iomem *addr, int val)
+static inline void out_be32(volatile unsigned __iomem *addr, u32 val)
{
__asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE (0)
-#define MAP_WRCOMBINE (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+#define readb_be(addr) \
+ __raw_readb((__force unsigned *)(addr))
+#define readw_be(addr) \
+ be16_to_cpu(__raw_readw((__force unsigned *)(addr)))
+#define readl_be(addr) \
+ be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
+#define readq_be(addr) \
+ be64_to_cpu(__raw_readq((__force unsigned *)(addr)))
+
+#define writeb_be(val, addr) \
+ __raw_writeb((val), (__force unsigned *)(addr))
+#define writew_be(val, addr) \
+ __raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr))
+#define writel_be(val, addr) \
+ __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))
+#define writeq_be(val, addr) \
+ __raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr))
+
+static inline void *phys_to_virt(phys_addr_t paddr)
{
#ifdef CONFIG_ADDR_MAP
- return (void *)(addrmap_phys_to_virt(paddr));
-#else
- return (void *)((unsigned long)paddr);
+ if (gd->flags & GD_FLG_RELOC)
+ return addrmap_phys_to_virt(paddr);
#endif
+ return (void *)((unsigned long)paddr);
}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
+#define phys_to_virt phys_to_virt
static inline phys_addr_t virt_to_phys(void * vaddr)
{
#ifdef CONFIG_ADDR_MAP
- return addrmap_virt_to_phys(vaddr);
-#else
- return (phys_addr_t)((unsigned long)vaddr);
+ if (gd->flags & GD_FLG_RELOC)
+ return addrmap_virt_to_phys(vaddr);
#endif
+ return (phys_addr_t)((unsigned long)vaddr);
}
+#define virt_to_phys virt_to_phys
+
+#include <asm-generic/io.h>
#endif