+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2002-2010
+ * Copyright 2020 NXP
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_GBL_DATA_H
struct arch_global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
+ u32 sdhc_per_clk;
#endif
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
unsigned long brg_clk;
#endif
#if defined(CONFIG_CPM2)
#endif
/* TODO: sjg@chromium.org: Should these be unslgned long? */
#if defined(CONFIG_MPC83xx)
+#ifdef CONFIG_CLK_MPC83XX
+ u32 core_clk;
+#else
/* There are other clocks in the MPC83XX */
u32 csb_clk;
-# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
- defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
+# if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
+ defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X)
u32 tsec1_clk;
u32 tsec2_clk;
u32 usbdr_clk;
-# elif defined(CONFIG_MPC8309)
+# elif defined(CONFIG_ARCH_MPC8309)
u32 usbdr_clk;
# endif
-# if defined(CONFIG_MPC834x)
+# if defined(CONFIG_ARCH_MPC834X)
u32 usbmph_clk;
-# endif /* CONFIG_MPC834x */
-# if defined(CONFIG_MPC8315)
+# endif /* CONFIG_ARCH_MPC834X */
+# if defined(CONFIG_ARCH_MPC8315)
u32 tdm_clk;
# endif
u32 core_clk;
u32 enc_clk;
u32 lbiu_clk;
u32 lclk_clk;
-# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
- defined(CONFIG_MPC837x)
+# if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
+ defined(CONFIG_ARCH_MPC837X)
u32 pciexp1_clk;
u32 pciexp2_clk;
# endif
-# if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
+# if defined(CONFIG_ARCH_MPC837X) || defined(CONFIG_ARCH_MPC8315)
u32 sata_clk;
# endif
-# if defined(CONFIG_MPC8360)
+# if defined(CONFIG_ARCH_MPC8360)
u32 mem_sec_clk;
-# endif /* CONFIG_MPC8360 */
+# endif /* CONFIG_ARCH_MPC8360 */
+#endif
#endif
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
u32 lbc_clk;
#if defined(CONFIG_E500)
u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
#endif
-#if defined(CONFIG_MPC5xxx)
- unsigned long ipb_clk;
-#endif
-#if defined(CONFIG_MPC512X)
- u32 ips_clk;
- u32 csb_clk;
-#endif /* CONFIG_MPC512X */
unsigned long reset_status; /* reset status register at boot */
#if defined(CONFIG_MPC83xx)
unsigned long arbiter_event_attributes;
unsigned long arbiter_event_address;
#endif
-#if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2)
+#if defined(CONFIG_CPM2)
unsigned int dp_alloc_base;
unsigned int dp_alloc_top;
#endif
-#if defined(CONFIG_4xx)
- u32 uart_clk;
-#endif /* CONFIG_4xx */
-#if defined(CONFIG_SYS_GT_6426x)
- unsigned int mirror_hack[16];
-#endif
#ifdef CONFIG_SYS_FPGA_COUNT
unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
#endif
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long wdt_last; /* trace watch-dog triggering rate */
#endif
-#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
+#if defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
};