powerpc: P4080: Remove macro CONFIG_PPC_P4080

[platform/kernel/u-boot.git] / arch / powerpc / include / asm / fsl_secure_boot.h

diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index 9420021..38b666c 100644 (file)
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -16,9 +16,9 @@
 
 #if defined(CONFIG_FSL_CORENET)
 #define CONFIG_SYS_PBI_FLASH_BASE              0xc0000000
-#elif defined(CONFIG_BSC9132QDS)
+#elif defined(CONFIG_TARGET_BSC9132QDS)
 #define CONFIG_SYS_PBI_FLASH_BASE              0xc8000000
-#elif defined(CONFIG_C29XPCIE)
+#elif defined(CONFIG_TARGET_C29XPCIE)
 #define CONFIG_SYS_PBI_FLASH_BASE              0xcc000000
 #else
 #define CONFIG_SYS_PBI_FLASH_BASE              0xce000000
@@ -35,7 +35,9 @@
        defined(CONFIG_T104xD4RDB) || \
        defined(CONFIG_PPC_T1023) || \
        defined(CONFIG_PPC_T1024)
+#ifndef CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_CPC_REINIT_F
+#endif
 #define CONFIG_KEY_REVOCATION
 #undef CONFIG_SYS_INIT_L3_ADDR
 #define CONFIG_SYS_INIT_L3_ADDR                        0xbff00000
@@ -43,18 +45,24 @@
 
 #if defined(CONFIG_RAMBOOT_PBL)
 #undef CONFIG_SYS_INIT_L3_ADDR
-#define CONFIG_SYS_INIT_L3_ADDR                        0xbff00000
+#ifdef CONFIG_SYS_INIT_L3_VADDR
+#define CONFIG_SYS_INIT_L3_ADDR        \
+                       (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \
+                                       0xbff00000
+#else
+#define CONFIG_SYS_INIT_L3_ADDR                0xbff00000
+#endif
 #endif
 
-#if defined(CONFIG_C29XPCIE)
+#if defined(CONFIG_TARGET_C29XPCIE)
 #define CONFIG_KEY_REVOCATION
 #endif
 
-#if defined(CONFIG_PPC_P3041)  ||      \
-       defined(CONFIG_PPC_P4080) ||    \
+#if defined(CONFIG_ARCH_P3041) ||      \
+       defined(CONFIG_ARCH_P4080) ||   \
        defined(CONFIG_PPC_P5020) ||    \
        defined(CONFIG_PPC_P5040) ||    \
-       defined(CONFIG_PPC_P2041)
+       defined(CONFIG_ARCH_P2041)
        #define CONFIG_FSL_TRUST_ARCH_v1
 #endif
 
@@ -71,13 +79,7 @@
 #endif /* #ifdef CONFIG_SECURE_BOOT */
 
 #ifdef CONFIG_CHAIN_OF_TRUST
-
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_DM                  1
-#define CONFIG_SPL_CRYPTO_SUPPORT
-#define CONFIG_SPL_HASH_SUPPORT
-#define CONFIG_SPL_RSA
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 /*
  * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init
  * due to space crunch on CPC and thus malloc will not work.
@@ -120,10 +122,10 @@
 /* If Boot Script is not on NOR and is required to be copied on RAM */
 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
 #define CONFIG_BS_HDR_ADDR_RAM         0x00010000
-#define CONFIG_BS_HDR_ADDR_FLASH       0x00800000
+#define CONFIG_BS_HDR_ADDR_DEVICE      0x00800000
 #define CONFIG_BS_HDR_SIZE             0x00002000
 #define CONFIG_BS_ADDR_RAM             0x00012000
-#define CONFIG_BS_ADDR_FLASH           0x00802000
+#define CONFIG_BS_ADDR_DEVICE          0x00802000
 #define CONFIG_BS_SIZE                 0x00001000
 
 #define CONFIG_BOOTSCRIPT_HDR_ADDR     CONFIG_BS_HDR_ADDR_RAM
@@ -136,9 +138,9 @@
 #define CONFIG_BOOTSCRIPT_HDR_ADDR     0xecc00000
 #elif defined(CONFIG_FSL_CORENET)
 #define CONFIG_BOOTSCRIPT_HDR_ADDR     0xe8e00000
-#elif defined(CONFIG_BSC9132QDS)
+#elif defined(CONFIG_TARGET_BSC9132QDS)
 #define CONFIG_BOOTSCRIPT_HDR_ADDR     0x88020000
-#elif defined(CONFIG_C29XPCIE)
+#elif defined(CONFIG_TARGET_C29XPCIE)
 #define CONFIG_BOOTSCRIPT_HDR_ADDR     0xec020000
 #else
 #define CONFIG_BOOTSCRIPT_HDR_ADDR     0xee020000