powerpc/85xx: Fixup determining PME, FMan freq
[platform/kernel/u-boot.git] / arch / powerpc / include / asm / config_mpc85xx.h
index 0529632..4228161 100644 (file)
 
 #elif defined(CONFIG_PPC_P2040)
 #define CONFIG_MAX_CPUS                        4
+#define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
 #define CONFIG_SYS_NUM_FMAN            1
 
 #elif defined(CONFIG_PPC_P3041)
 #define CONFIG_MAX_CPUS                        4
+#define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
 #define CONFIG_SYS_NUM_FMAN            1
 
 #elif defined(CONFIG_PPC_P4040)
 #define CONFIG_MAX_CPUS                        4
+#define CONFIG_SYS_FSL_NUM_CC_PLLS     4
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
 #define CONFIG_SYS_FM_MURAM_SIZE       0x28000
 
 #elif defined(CONFIG_PPC_P4080)
 #define CONFIG_MAX_CPUS                        8
+#define CONFIG_SYS_FSL_NUM_CC_PLLS     4
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
 #define CONFIG_SYS_NUM_FMAN            2
 /* P5010 is single core version of P5020 */
 #elif defined(CONFIG_PPC_P5010)
 #define CONFIG_MAX_CPUS                        1
+#define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
 #define CONFIG_SYS_NUM_FMAN            1
 
 #elif defined(CONFIG_PPC_P5020)
 #define CONFIG_MAX_CPUS                        2
+#define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
 #define CONFIG_SYS_NUM_FMAN            1