* (C) Copyright 2002-2004
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include "sdram.h"
#include "ecc.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SDRAM_BANK0
#ifndef CONFIG_440
sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE;
#endif
-#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0]))
+#define N_MB0CF (ARRAY_SIZE(mb0cf))
#ifdef CONFIG_SYS_SDRAM_CASL
static ulong ns2clks(ulong ns)
/*
* Autodetect onboard SDRAM on 405 platforms
*/
-phys_size_t initdram(int board_type)
+int dram_init(void)
{
ulong speed;
ulong sdtr1;
/*
* OK, size detected -> all done
*/
- return size;
+ gd->ram_size = size;
+
+ return 0;
}
}
- return 0;
+ return -ENXIO;
}
#else /* CONFIG_440 */
#define CONFIG_SYS_SDRAM0_CFG0 0x82000000 /* DCEN=1, PMUD=0, 64-bit */
#endif
-#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0]))
+#define N_MB0CF (ARRAY_SIZE(mb0cf))
#define NUM_TRIES 64
#define NUM_READS 10
* so this should be extended for other future boards
* using this routine!
*/
-phys_size_t initdram(int board_type)
+int dram_init(void)
{
int i;
int tr1_bank1;
/*
* OK, size detected -> all done
*/
- return size;
+ gd->ram_size = size;
+
+ return 0;
}
}
- return 0; /* nothing found ! */
+ return -ENXIO; /* nothing found ! */
}
#endif /* CONFIG_440 */