Merge branch 'master' of git://git.denx.de/u-boot-arm
[platform/kernel/u-boot.git] / arch / powerpc / cpu / mpc85xx / cpu.c
index 892bfa4..fbee753 100644 (file)
@@ -104,7 +104,7 @@ int checkcpu (void)
                puts("CPU:   ");
        }
 
-       cpu = gd->cpu;
+       cpu = gd->arch.cpu;
 
        puts(cpu->name);
        if (IS_E_PROCESSOR(svr))
@@ -121,16 +121,16 @@ int checkcpu (void)
        switch(ver) {
        case PVR_VER_E500_V1:
        case PVR_VER_E500_V2:
-               puts("E500");
+               puts("e500");
                break;
        case PVR_VER_E500MC:
-               puts("E500MC");
+               puts("e500mc");
                break;
        case PVR_VER_E5500:
-               puts("E5500");
+               puts("e5500");
                break;
        case PVR_VER_E6500:
-               puts("E6500");
+               puts("e6500");
                break;
        default:
                puts("Unknown");
@@ -217,6 +217,10 @@ int checkcpu (void)
        }
 #endif
 
+#ifdef CONFIG_SYS_DPAA_QBMAN
+       printf("       QMAN:  %s MHz\n", strmhz(buf1, sysinfo.freqQMAN));
+#endif
+
 #ifdef CONFIG_SYS_DPAA_PME
        printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freqPME));
 #endif
@@ -278,14 +282,6 @@ unsigned long get_tbclk (void)
 
 #if defined(CONFIG_WATCHDOG)
 void
-watchdog_reset(void)
-{
-       int re_enable = disable_interrupts();
-       reset_85xx_watchdog();
-       if (re_enable) enable_interrupts();
-}
-
-void
 reset_85xx_watchdog(void)
 {
        /*
@@ -293,6 +289,16 @@ reset_85xx_watchdog(void)
         */
        mtspr(SPRN_TSR, TSR_WIS);
 }
+
+void
+watchdog_reset(void)
+{
+       int re_enable = disable_interrupts();
+
+       reset_85xx_watchdog();
+       if (re_enable)
+               enable_interrupts();
+}
 #endif /* CONFIG_WATCHDOG */
 
 /*
@@ -328,13 +334,14 @@ void mpc85xx_reginfo(void)
 
 /* Common ddr init for non-corenet fsl 85xx platforms */
 #ifndef CONFIG_FSL_CORENET
-#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SYS_INIT_L2_ADDR)
+#if (defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)) && \
+       !defined(CONFIG_SYS_INIT_L2_ADDR)
 phys_size_t initdram(int board_type)
 {
 #if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD)
        return fsl_ddr_sdram_size();
 #else
-       return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+       return (phys_size_t)CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
 #endif
 }
 #else /* CONFIG_SYS_RAMBOOT */
@@ -446,21 +453,21 @@ static void dump_spd_ddr_reg(void)
        for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
                switch (i) {
                case 0:
-                       ddr[i] = (void *)CONFIG_SYS_MPC85xx_DDR_ADDR;
+                       ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
                        break;
-#if defined(CONFIG_SYS_MPC85xx_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1)
+#if defined(CONFIG_SYS_MPC8xxx_DDR2_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 1)
                case 1:
-                       ddr[i] = (void *)CONFIG_SYS_MPC85xx_DDR2_ADDR;
+                       ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR2_ADDR;
                        break;
 #endif
-#if defined(CONFIG_SYS_MPC85xx_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2)
+#if defined(CONFIG_SYS_MPC8xxx_DDR3_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 2)
                case 2:
-                       ddr[i] = (void *)CONFIG_SYS_MPC85xx_DDR3_ADDR;
+                       ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR3_ADDR;
                        break;
 #endif
-#if defined(CONFIG_SYS_MPC85xx_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3)
+#if defined(CONFIG_SYS_MPC8xxx_DDR4_ADDR) && (CONFIG_NUM_DDR_CONTROLLERS > 3)
                case 3:
-                       ddr[i] = (void *)CONFIG_SYS_MPC85xx_DDR4_ADDR;
+                       ddr[i] = (void *)CONFIG_SYS_MPC8xxx_DDR4_ADDR;
                        break;
 #endif
                default: