{
sys_info_t sysinfo;
uint pvr, svr;
- uint fam;
uint ver;
uint major, minor;
struct cpu_type *cpu;
u32 ddr_ratio = 0;
#endif /* CONFIG_FSL_CORENET */
#endif /* CONFIG_DDR_CLK_FREQ */
- int i;
+ unsigned int i, core, nr_cores = cpu_numcores();
+ u32 mask = cpu_mask();
svr = get_svr();
major = SVR_MAJ(svr);
printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
pvr = get_pvr();
- fam = PVR_FAM(pvr);
ver = PVR_VER(pvr);
major = PVR_MAJ(pvr);
minor = PVR_MIN(pvr);
printf("Core: ");
- if (PVR_FAM(PVR_85xx)) {
- switch(PVR_MEM(pvr)) {
- case 0x1:
- case 0x2:
- puts("E500");
- break;
- case 0x3:
- puts("E500MC");
- break;
- case 0x4:
- puts("E5500");
- break;
- default:
- puts("Unknown");
- break;
- }
- } else {
+ switch(ver) {
+ case PVR_VER_E500_V1:
+ case PVR_VER_E500_V2:
+ puts("E500");
+ break;
+ case PVR_VER_E500MC:
+ puts("E500MC");
+ break;
+ case PVR_VER_E5500:
+ puts("E5500");
+ break;
+ default:
puts("Unknown");
+ break;
}
printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
get_sys_info(&sysinfo);
puts("Clock Configuration:");
- for (i = 0; i < cpu_numcores(); i++) {
+ for_each_cpu(i, core, nr_cores, mask) {
if (!(i & 3))
printf ("\n ");
- printf("CPU%d:%-4s MHz, ",
- i,strmhz(buf1, sysinfo.freqProcessor[i]));
+ printf("CPU%d:%-4s MHz, ", core,
+ strmhz(buf1, sysinfo.freqProcessor[core]));
}
printf("\n CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus));
lbc_sdram_init();
#endif
- puts("DDR: ");
+ debug("DDR: ");
return dram_size;
}
#endif /* CONFIG_SYS_RAMBOOT */