Merge branch 'u-boot/master' into u-boot-arm/master

[platform/kernel/u-boot.git] / arch / powerpc / cpu / mpc85xx / Makefile

diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 5791be0..0d1e8f1 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -5,30 +5,29 @@
 # (C) Copyright 2002,2003 Motorola Inc.
 # Xianghua Xiao,X.Xiao@motorola.com
 #
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
+# SPDX-License-Identifier:     GPL-2.0+
 #
 
 include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(CPU).o
 
-START  = start.o resetvec.o
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+START = start.o resetvec.o
+
+ifdef MINIMAL
+
+COBJS-y        += cpu_init_early.o tlb.o spl_minimal.o
+
+else
+
 SOBJS-$(CONFIG_MP)     += release.o
 SOBJS  = $(SOBJS-y)
 
@@ -58,11 +57,23 @@ COBJS-$(CONFIG_P1014)       += ddr-gen3.o
 COBJS-$(CONFIG_P1020)  += ddr-gen3.o
 COBJS-$(CONFIG_P1021)  += ddr-gen3.o
 COBJS-$(CONFIG_P1022)  += ddr-gen3.o
+COBJS-$(CONFIG_P1023)  += ddr-gen3.o
+COBJS-$(CONFIG_P1024)  += ddr-gen3.o
+COBJS-$(CONFIG_P1025)  += ddr-gen3.o
 COBJS-$(CONFIG_P2010)  += ddr-gen3.o
 COBJS-$(CONFIG_P2020)  += ddr-gen3.o
+COBJS-$(CONFIG_PPC_P2041)      += ddr-gen3.o
 COBJS-$(CONFIG_PPC_P3041)      += ddr-gen3.o
 COBJS-$(CONFIG_PPC_P4080)      += ddr-gen3.o
 COBJS-$(CONFIG_PPC_P5020)      += ddr-gen3.o
+COBJS-$(CONFIG_PPC_P5040)      += ddr-gen3.o
+COBJS-$(CONFIG_PPC_T4240)      += ddr-gen3.o
+COBJS-$(CONFIG_PPC_T4160)      += ddr-gen3.o
+COBJS-$(CONFIG_PPC_B4420)      += ddr-gen3.o
+COBJS-$(CONFIG_PPC_B4860)      += ddr-gen3.o
+COBJS-$(CONFIG_BSC9131)                += ddr-gen3.o
+COBJS-$(CONFIG_BSC9132)                += ddr-gen3.o
+COBJS-$(CONFIG_PPC_T1040)      += ddr-gen3.o
 
 COBJS-$(CONFIG_CPM2)   += ether_fcc.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
@@ -72,13 +83,21 @@ COBJS-$(CONFIG_PCI) += pci.o
 COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
 
 # various SoC specific assignments
+COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o
 COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
 COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
 COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
+COBJS-$(CONFIG_PPC_P5040) += p5040_ids.o
+COBJS-$(CONFIG_PPC_T4240) += t4240_ids.o
+COBJS-$(CONFIG_PPC_T4160) += t4240_ids.o
+COBJS-$(CONFIG_PPC_B4420) += b4860_ids.o
+COBJS-$(CONFIG_PPC_B4860) += b4860_ids.o
+COBJS-$(CONFIG_PPC_T1040) += t1040_ids.o
 
 COBJS-$(CONFIG_QE)     += qe_io.o
 COBJS-$(CONFIG_CPM2)   += serial_scc.o
-COBJS-$(CONFIG_FSL_CORENET) += fsl_corenet_serdes.o
+COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
+COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
 
 # SoC specific SERDES support
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
@@ -97,20 +116,36 @@ COBJS-$(CONFIG_P1020)      += p1021_serdes.o
 COBJS-$(CONFIG_P1021)  += p1021_serdes.o
 COBJS-$(CONFIG_P1022)  += p1022_serdes.o
 COBJS-$(CONFIG_P1023)  += p1023_serdes.o
+COBJS-$(CONFIG_P1024)  += p1021_serdes.o
+COBJS-$(CONFIG_P1025)  += p1021_serdes.o
 COBJS-$(CONFIG_P2010)  += p2020_serdes.o
 COBJS-$(CONFIG_P2020)  += p2020_serdes.o
+COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o
 COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
 COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
 COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
+COBJS-$(CONFIG_PPC_P5040) += p5040_serdes.o
+COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o
+COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o
+COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o
+COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o
+COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o
+COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o
+
+COBJS-y        += cpu.o
+COBJS-y        += cpu_init.o
+COBJS-y        += cpu_init_early.o
+COBJS-y        += interrupts.o
+COBJS-y        += speed.o
+COBJS-y        += tlb.o
+COBJS-y        += traps.o
+
+# Stub implementations of cache management functions for USB
+COBJS-y += cache.o
+
+endif # not minimal
 
 COBJS  = $(COBJS-y)
-COBJS  += cpu.o
-COBJS  += cpu_init.o
-COBJS  += cpu_init_early.o
-COBJS  += interrupts.o
-COBJS  += speed.o
-COBJS  += tlb.o
-COBJS  += traps.o
 
 SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))