powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907

[platform/kernel/u-boot.git] / arch / powerpc / cpu / mpc85xx / Kconfig

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index d151f49..b0f34b6 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -345,8 +345,10 @@ config ARCH_B4420
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config ARCH_B4860
        bool
@@ -363,11 +365,14 @@ config ARCH_B4860
        select SYS_FSL_ERRATUM_A007075
        select SYS_FSL_ERRATUM_A007186
        select SYS_FSL_ERRATUM_A007212
+       select SYS_FSL_ERRATUM_A007907
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config ARCH_BSC9131
        bool
@@ -646,6 +651,7 @@ config ARCH_P2041
        select SYS_FSL_ERRATUM_USB14
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS1
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
 
@@ -668,6 +674,7 @@ config ARCH_P3041
        select SYS_FSL_ERRATUM_USB14
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS1
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
 
@@ -701,6 +708,7 @@ config ARCH_P4080
        select SYS_P4080_ERRATUM_SERDES_A005
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS1
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
 
@@ -719,8 +727,10 @@ config ARCH_P5020
        select SYS_FSL_ERRATUM_USB14
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS1
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config ARCH_P5040
        bool
@@ -737,8 +747,10 @@ config ARCH_P5040
        select SYS_FSL_ERRATUM_USB14
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS1
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config ARCH_QEMU_E500
        bool
@@ -755,6 +767,7 @@ config ARCH_T1023
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
 
@@ -770,6 +783,7 @@ config ARCH_T1024
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
 
@@ -786,6 +800,7 @@ config ARCH_T1040
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
 
@@ -802,6 +817,7 @@ config ARCH_T1042
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
 
@@ -815,12 +831,15 @@ config ARCH_T2080
        select SYS_FSL_ERRATUM_A006593
        select SYS_FSL_ERRATUM_A007186
        select SYS_FSL_ERRATUM_A007212
+       select SYS_FSL_ERRATUM_A007907
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config ARCH_T2081
        bool
@@ -836,8 +855,10 @@ config ARCH_T2081
        select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config ARCH_T4160
        bool
@@ -854,8 +875,10 @@ config ARCH_T4160
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config ARCH_T4240
        bool
@@ -870,11 +893,14 @@ config ARCH_T4240
        select SYS_FSL_ERRATUM_A006593
        select SYS_FSL_ERRATUM_A007186
        select SYS_FSL_ERRATUM_A007798
+       select SYS_FSL_ERRATUM_A007907
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
+       select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select SYS_PPC64
 
 config BOOKE
        bool
@@ -1058,6 +1084,9 @@ config SYS_FSL_ERRATUM_A007212
 config SYS_FSL_ERRATUM_A007798
        bool
 
+config SYS_FSL_ERRATUM_A007907
+       bool
+
 config SYS_FSL_ERRATUM_A008044
        bool
 
@@ -1132,6 +1161,12 @@ config SYS_P4080_ERRATUM_SERDES_A001
 config SYS_P4080_ERRATUM_SERDES_A005
        bool
 
+config SYS_FSL_QORIQ_CHASSIS1
+       bool
+
+config SYS_FSL_QORIQ_CHASSIS2
+       bool
+
 config SYS_FSL_NUM_LAWS
        int "Number of local access windows"
        depends on FSL_LAW
@@ -1189,6 +1224,9 @@ config SYS_NUM_TLBCAMS
                Number of TLB CAM entries for Book-E chips. 64 for E500MC,
                16 for other E500 SoCs.
 
+config SYS_PPC64
+       bool
+
 config SYS_PPC_E500_USE_DEBUG_TLB
        bool