config SYS_CPU
default "mpc85xx"
+config CMD_ERRATA
+ bool "Enable the 'errata' command"
+ depends on MPC85xx
+ default y
+ help
+ This enables the 'errata' command which displays a list of errata
+ work-arounds which are enabled for the current board.
+
choice
prompt "Target select"
optional
bool "Support socrates"
select ARCH_MPC8544
-config TARGET_B4420QDS
- bool "Support B4420QDS"
- select ARCH_B4420
- select SUPPORT_SPL
- select PHYS_64BIT
-
-config TARGET_B4860QDS
- bool "Support B4860QDS"
- select ARCH_B4860
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select SUPPORT_SPL
- select PHYS_64BIT
-
-config TARGET_BSC9131RDB
- bool "Support BSC9131RDB"
- select ARCH_BSC9131
- select SUPPORT_SPL
- select BOARD_EARLY_INIT_F
-
-config TARGET_BSC9132QDS
- bool "Support BSC9132QDS"
- select ARCH_BSC9132
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select SUPPORT_SPL
- select BOARD_EARLY_INIT_F
-
-config TARGET_C29XPCIE
- bool "Support C29XPCIE"
- select ARCH_C29X
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select SUPPORT_SPL
- select SUPPORT_TPL
- select PHYS_64BIT
-
config TARGET_P3041DS
bool "Support P3041DS"
select PHYS_64BIT
select ARCH_P3041
select BOARD_LATE_INIT if CHAIN_OF_TRUST
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P4080DS
bool "Support P4080DS"
select PHYS_64BIT
select ARCH_P4080
select BOARD_LATE_INIT if CHAIN_OF_TRUST
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P5020DS
bool "Support P5020DS"
select PHYS_64BIT
select ARCH_P5020
select BOARD_LATE_INIT if CHAIN_OF_TRUST
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P5040DS
bool "Support P5040DS"
select PHYS_64BIT
select ARCH_P5040
select BOARD_LATE_INIT if CHAIN_OF_TRUST
-
-config TARGET_MPC8536DS
- bool "Support MPC8536DS"
- select ARCH_MPC8536
-# Use DDR3 controller with DDR2 DIMMs on this board
- select SYS_FSL_DDRC_GEN3
-
-config TARGET_MPC8540ADS
- bool "Support MPC8540ADS"
- select ARCH_MPC8540
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_MPC8541CDS
bool "Support MPC8541CDS"
config TARGET_MPC8544DS
bool "Support MPC8544DS"
select ARCH_MPC8544
+ imply PANIC_HANG
config TARGET_MPC8548CDS
bool "Support MPC8548CDS"
bool "Support MPC8555CDS"
select ARCH_MPC8555
-config TARGET_MPC8560ADS
- bool "Support MPC8560ADS"
- select ARCH_MPC8560
-
config TARGET_MPC8568MDS
bool "Support MPC8568MDS"
select ARCH_MPC8568
select ARCH_MPC8572
# Use DDR3 controller with DDR2 DIMMs on this board
select SYS_FSL_DDRC_GEN3
+ imply SCSI
+ imply PANIC_HANG
config TARGET_P1010RDB_PA
bool "Support P1010RDB_PA"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select SUPPORT_TPL
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1010RDB_PB
bool "Support P1010RDB_PB"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select SUPPORT_TPL
-
-config TARGET_P1022DS
- bool "Support P1022DS"
- select ARCH_P1022
- select SUPPORT_SPL
- select SUPPORT_TPL
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1023RDB
bool "Support P1023RDB"
select ARCH_P1023
+ select FSL_DDR_INTERACTIVE
+ imply CMD_EEPROM
+ imply PANIC_HANG
config TARGET_P1020MBG
bool "Support P1020MBG-PC"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1020
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1020RDB_PC
bool "Support P1020RDB-PC"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1020
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1020RDB_PD
bool "Support P1020RDB-PD"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1020
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1020UTM
bool "Support P1020UTM"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1020
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1021RDB
bool "Support P1021RDB"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1021
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1024RDB
bool "Support P1024RDB"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1024
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_P1025RDB
bool "Support P1025RDB"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P1025
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply SATA_SIL
config TARGET_P2020RDB
bool "Support P2020RDB-PC"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P2020
-
-config TARGET_P1_TWR
- bool "Support p1_twr"
- select ARCH_P1025
+ imply CMD_EEPROM
+ imply CMD_SATA
+ imply SATA_SIL
config TARGET_P2041RDB
bool "Support P2041RDB"
select ARCH_P2041
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select PHYS_64BIT
+ imply CMD_SATA
+ imply FSL_SATA
config TARGET_QEMU_PPCE500
bool "Support qemu-ppce500"
select ARCH_QEMU_E500
select PHYS_64BIT
-config TARGET_T1024QDS
- bool "Support T1024QDS"
- select ARCH_T1024
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select SUPPORT_SPL
- select PHYS_64BIT
-
config TARGET_T1023RDB
bool "Support T1023RDB"
select ARCH_T1023
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ select FSL_DDR_INTERACTIVE
+ imply CMD_EEPROM
+ imply PANIC_HANG
config TARGET_T1024RDB
bool "Support T1024RDB"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
-
-config TARGET_T1040QDS
- bool "Support T1040QDS"
- select ARCH_T1040
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select PHYS_64BIT
+ select FSL_DDR_INTERACTIVE
+ imply CMD_EEPROM
+ imply PANIC_HANG
config TARGET_T1040RDB
bool "Support T1040RDB"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_T1040D4RDB
bool "Support T1040D4RDB"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_T1042RDB
bool "Support T1042RDB"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ imply CMD_SATA
config TARGET_T1042D4RDB
bool "Support T1042D4RDB"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_T1042RDB_PI
bool "Support T1042RDB_PI"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_T2080QDS
bool "Support T2080QDS"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+ select FSL_DDR_INTERACTIVE
+ imply CMD_SATA
config TARGET_T2080RDB
bool "Support T2080RDB"
select BOARD_LATE_INIT if CHAIN_OF_TRUST
select SUPPORT_SPL
select PHYS_64BIT
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_T2081QDS
bool "Support T2081QDS"
select ARCH_T2081
select SUPPORT_SPL
select PHYS_64BIT
-
-config TARGET_T4160QDS
- bool "Support T4160QDS"
- select ARCH_T4160
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select SUPPORT_SPL
- select PHYS_64BIT
+ select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+ select FSL_DDR_INTERACTIVE
config TARGET_T4160RDB
bool "Support T4160RDB"
select ARCH_T4160
select SUPPORT_SPL
select PHYS_64BIT
-
-config TARGET_T4240QDS
- bool "Support T4240QDS"
- select ARCH_T4240
- select BOARD_LATE_INIT if CHAIN_OF_TRUST
- select SUPPORT_SPL
- select PHYS_64BIT
+ imply PANIC_HANG
config TARGET_T4240RDB
bool "Support T4240RDB"
select ARCH_T4240
select SUPPORT_SPL
select PHYS_64BIT
+ select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_CONTROLCENTERD
bool "Support controlcenterd"
config TARGET_KMP204X
bool "Support kmp204x"
- select ARCH_P2041
- select PHYS_64BIT
- imply CMD_CRAMFS
- imply FS_CRAMFS
+ select VENDOR_KM
config TARGET_XPEDITE520X
bool "Support xpedite520x"
config TARGET_UCP1020
bool "Support uCP1020"
select ARCH_P1020
+ imply CMD_SATA
+ imply PANIC_HANG
config TARGET_CYRUS_P5020
bool "Support Varisys Cyrus P5020"
select ARCH_P5020
select PHYS_64BIT
+ imply PANIC_HANG
config TARGET_CYRUS_P5040
bool "Support Varisys Cyrus P5040"
select ARCH_P5040
select PHYS_64BIT
+ imply PANIC_HANG
endchoice
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_B4860
bool
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_BSC9131
bool
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select FSL_IFC
+ imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_BSC9132
bool
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_ERRATUM_I2C_A004447
select SYS_FSL_ERRATUM_IFC_A002769
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
+ imply CMD_EEPROM
+ imply CMD_MTDPARTS
+ imply CMD_NAND
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_C29X
bool
select SYS_FSL_DDR_VER_46
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_6
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
+ imply CMD_NAND
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_MPC8536
bool
select FSL_LAW
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_MPC8540
bool
bool
select FSL_LAW
select SYS_FSL_ERRATUM_A005125
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_ERRATUM_NMG_LBC103
select SYS_FSL_ERRATUM_NMG_ETSEC129
select SYS_FSL_ERRATUM_I2C_A004447
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
+ imply CMD_REGINFO
config ARCH_MPC8555
bool
config ARCH_MPC8568
bool
select FSL_LAW
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select FSL_LAW
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select FSL_ELBC
+ imply CMD_NAND
config ARCH_MPC8572
bool
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_DDR_115
select SYS_FSL_ERRATUM_DDR111_DDR134
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR2
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_NAND
config ARCH_P1010
bool
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
+ select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_A007075
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_ERRATUM_P1010_A003549
select SYS_FSL_ERRATUM_SEC_A003571
select SYS_FSL_ERRATUM_IFC_A003399
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
+ imply CMD_EEPROM
+ imply CMD_MTDPARTS
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_P1011
bool
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_DISABLE_ASPM
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_DISABLE_ASPM
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
+ imply SATA_SIL
config ARCH_P1021
bool
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_DISABLE_ASPM
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_REGINFO
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_REGINFO
+ imply SATA_SIL
config ARCH_P1022
bool
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_ERRATUM_SATA_A001
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_I2C_A004447
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_DISABLE_ASPM
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
+ imply SATA_SIL
config ARCH_P1025
bool
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ELBC_A001
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_DISABLE_ASPM
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P2020
bool
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_ERRATUM_ESDHC_A001
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_P2041
bool
select FSL_LAW
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
+ select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
select SYS_FSL_ERRATUM_DDR_A003
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select FSL_ELBC
+ imply CMD_NAND
config ARCH_P3041
bool
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
+ select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select FSL_ELBC
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_P4080
bool
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select FSL_ELBC
+ imply CMD_SATA
+ imply CMD_REGINFO
+ imply SATA_SIL
config ARCH_P5020
bool
select FSL_LAW
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
+ select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
select SYS_FSL_ERRATUM_DDR_A003474
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_ELBC
+ imply CMD_SATA
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_P5040
bool
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004699
+ select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_ELBC
+ imply CMD_SATA
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_QEMU_E500
bool
select FSL_LAW
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
+ imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T1024
bool
select FSL_LAW
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
+ imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_MTDPARTS
+ imply CMD_REGINFO
config ARCH_T1040
bool
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
+ imply CMD_MTDPARTS
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_T1042
bool
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
+ imply CMD_MTDPARTS
+ imply CMD_NAND
+ imply CMD_SATA
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_T2080
bool
select SYS_FSL_ERRATUM_A007212
select SYS_FSL_ERRATUM_A007815
select SYS_FSL_ERRATUM_A007907
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_SATA
+ imply CMD_NAND
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_T2081
bool
select SYS_FSL_ERRATUM_A007212
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
+ select FSL_PCIE_RESET
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T4160
bool
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_SATA
+ imply CMD_NAND
+ imply CMD_REGINFO
+ imply FSL_SATA
config ARCH_T4240
bool
select SYS_FSL_ERRATUM_A007798
select SYS_FSL_ERRATUM_A007815
select SYS_FSL_ERRATUM_A007907
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_SATA
+ imply CMD_NAND
+ imply CMD_REGINFO
+ imply FSL_SATA
+
+config MPC85XX_HAVE_RESET_VECTOR
+ bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc"
+ depends on MPC85xx
config BOOKE
bool
config E500MC
bool
+ imply CMD_PCI
help
Enble PowerPC E500MC core
help
Use Freescale common code for Local Access Window
-config SECURE_BOOT
- bool "Secure Boot"
+config NXP_ESBC
+ bool "NXP_ESBC"
help
Enable Freescale Secure Boot feature. Normally selected
by defconfig. If unsure, do not change.
config SYS_FSL_ERRATUM_A005871
bool
+config SYS_FSL_ERRATUM_A005275
+ bool
+
config SYS_FSL_ERRATUM_A006261
bool
config SYS_P4080_ERRATUM_SERDES_A005
bool
+config FSL_PCIE_DISABLE_ASPM
+ bool
+
+config FSL_PCIE_RESET
+ bool
+
config SYS_FSL_QORIQ_CHASSIS1
bool
Defines divider of platform clock(clock input to
eLBC controller).
-source "board/freescale/b4860qds/Kconfig"
-source "board/freescale/bsc9131rdb/Kconfig"
-source "board/freescale/bsc9132qds/Kconfig"
-source "board/freescale/c29xpcie/Kconfig"
source "board/freescale/corenet_ds/Kconfig"
-source "board/freescale/mpc8536ds/Kconfig"
-source "board/freescale/mpc8540ads/Kconfig"
source "board/freescale/mpc8541cds/Kconfig"
source "board/freescale/mpc8544ds/Kconfig"
source "board/freescale/mpc8548cds/Kconfig"
source "board/freescale/mpc8555cds/Kconfig"
-source "board/freescale/mpc8560ads/Kconfig"
source "board/freescale/mpc8568mds/Kconfig"
source "board/freescale/mpc8569mds/Kconfig"
source "board/freescale/mpc8572ds/Kconfig"
source "board/freescale/p1010rdb/Kconfig"
-source "board/freescale/p1022ds/Kconfig"
source "board/freescale/p1023rdb/Kconfig"
source "board/freescale/p1_p2_rdb_pc/Kconfig"
-source "board/freescale/p1_twr/Kconfig"
source "board/freescale/p2041rdb/Kconfig"
source "board/freescale/qemu-ppce500/Kconfig"
-source "board/freescale/t102xqds/Kconfig"
source "board/freescale/t102xrdb/Kconfig"
-source "board/freescale/t1040qds/Kconfig"
source "board/freescale/t104xrdb/Kconfig"
source "board/freescale/t208xqds/Kconfig"
source "board/freescale/t208xrdb/Kconfig"
-source "board/freescale/t4qds/Kconfig"
source "board/freescale/t4rdb/Kconfig"
source "board/gdsys/p1022/Kconfig"
-source "board/keymile/kmp204x/Kconfig"
+source "board/keymile/Kconfig"
source "board/sbc8548/Kconfig"
source "board/socrates/Kconfig"
source "board/varisys/cyrus/Kconfig"
projects / platform / kernel / u-boot.git / blobdiff