powerpc: Remove TWR-P1025_defconfig board
[platform/kernel/u-boot.git] / arch / powerpc / cpu / mpc85xx / Kconfig
index 309ca29..753d075 100644 (file)
@@ -24,43 +24,6 @@ config TARGET_SOCRATES
        bool "Support socrates"
        select ARCH_MPC8544
 
-config TARGET_B4420QDS
-       bool "Support B4420QDS"
-       select ARCH_B4420
-       select SUPPORT_SPL
-       select PHYS_64BIT
-       imply PANIC_HANG
-
-config TARGET_B4860QDS
-       bool "Support B4860QDS"
-       select ARCH_B4860
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select PHYS_64BIT
-       imply PANIC_HANG
-
-config TARGET_BSC9131RDB
-       bool "Support BSC9131RDB"
-       select ARCH_BSC9131
-       select SUPPORT_SPL
-       select BOARD_EARLY_INIT_F
-
-config TARGET_BSC9132QDS
-       bool "Support BSC9132QDS"
-       select ARCH_BSC9132
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select BOARD_EARLY_INIT_F
-
-config TARGET_C29XPCIE
-       bool "Support C29XPCIE"
-       select ARCH_C29X
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select SUPPORT_TPL
-       select PHYS_64BIT
-       imply PANIC_HANG
-
 config TARGET_P3041DS
        bool "Support P3041DS"
        select PHYS_64BIT
@@ -93,14 +56,6 @@ config TARGET_P5040DS
        imply CMD_SATA
        imply PANIC_HANG
 
-config TARGET_MPC8536DS
-       bool "Support MPC8536DS"
-       select ARCH_MPC8536
-# Use DDR3 controller with DDR2 DIMMs on this board
-       select SYS_FSL_DDRC_GEN3
-       imply CMD_SATA
-       imply FSL_SATA
-
 config TARGET_MPC8541CDS
        bool "Support MPC8541CDS"
        select ARCH_MPC8541
@@ -154,17 +109,10 @@ config TARGET_P1010RDB_PB
        imply CMD_SATA
        imply PANIC_HANG
 
-config TARGET_P1022DS
-       bool "Support P1022DS"
-       select ARCH_P1022
-       select SUPPORT_SPL
-       select SUPPORT_TPL
-       imply CMD_SATA
-       imply FSL_SATA
-
 config TARGET_P1023RDB
        bool "Support P1023RDB"
        select ARCH_P1023
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -240,10 +188,6 @@ config TARGET_P2020RDB
        imply CMD_SATA
        imply SATA_SIL
 
-config TARGET_P1_TWR
-       bool "Support p1_twr"
-       select ARCH_P1025
-
 config TARGET_P2041RDB
        bool "Support P2041RDB"
        select ARCH_P2041
@@ -257,22 +201,13 @@ config TARGET_QEMU_PPCE500
        select ARCH_QEMU_E500
        select PHYS_64BIT
 
-config TARGET_T1024QDS
-       bool "Support T1024QDS"
-       select ARCH_T1024
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select PHYS_64BIT
-       imply CMD_EEPROM
-       imply CMD_SATA
-       imply FSL_SATA
-
 config TARGET_T1023RDB
        bool "Support T1023RDB"
        select ARCH_T1023
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
@@ -282,18 +217,10 @@ config TARGET_T1024RDB
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_INTERACTIVE
        imply CMD_EEPROM
        imply PANIC_HANG
 
-config TARGET_T1040QDS
-       bool "Support T1040QDS"
-       select ARCH_T1040
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select PHYS_64BIT
-       imply CMD_EEPROM
-       imply CMD_SATA
-       imply PANIC_HANG
-
 config TARGET_T1040RDB
        bool "Support T1040RDB"
        select ARCH_T1040
@@ -344,6 +271,8 @@ config TARGET_T2080QDS
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       select FSL_DDR_INTERACTIVE
        imply CMD_SATA
 
 config TARGET_T2080RDB
@@ -360,15 +289,8 @@ config TARGET_T2081QDS
        select ARCH_T2081
        select SUPPORT_SPL
        select PHYS_64BIT
-
-config TARGET_T4160QDS
-       bool "Support T4160QDS"
-       select ARCH_T4160
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select PHYS_64BIT
-       imply CMD_SATA
-       imply PANIC_HANG
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
+       select FSL_DDR_INTERACTIVE
 
 config TARGET_T4160RDB
        bool "Support T4160RDB"
@@ -377,20 +299,12 @@ config TARGET_T4160RDB
        select PHYS_64BIT
        imply PANIC_HANG
 
-config TARGET_T4240QDS
-       bool "Support T4240QDS"
-       select ARCH_T4240
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select PHYS_64BIT
-       imply CMD_SATA
-       imply PANIC_HANG
-
 config TARGET_T4240RDB
        bool "Support T4240RDB"
        select ARCH_T4240
        select SUPPORT_SPL
        select PHYS_64BIT
+       select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
        imply CMD_SATA
        imply PANIC_HANG
 
@@ -400,10 +314,7 @@ config TARGET_CONTROLCENTERD
 
 config TARGET_KMP204X
        bool "Support kmp204x"
-       select ARCH_P2041
-       select PHYS_64BIT
-       imply CMD_CRAMFS
-       imply FS_CRAMFS
+       select VENDOR_KM
 
 config TARGET_XPEDITE520X
        bool "Support xpedite520x"
@@ -520,6 +431,7 @@ config ARCH_BSC9132
        select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_ERRATUM_I2C_A004447
        select SYS_FSL_ERRATUM_IFC_A002769
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -538,6 +450,7 @@ config ARCH_C29X
        select SYS_FSL_DDR_VER_46
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -553,6 +466,7 @@ config ARCH_MPC8536
        select FSL_LAW
        select SYS_FSL_ERRATUM_A004508
        select SYS_FSL_ERRATUM_A005125
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
@@ -581,6 +495,7 @@ config ARCH_MPC8544
        bool
        select FSL_LAW
        select SYS_FSL_ERRATUM_A005125
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -596,6 +511,7 @@ config ARCH_MPC8548
        select SYS_FSL_ERRATUM_NMG_LBC103
        select SYS_FSL_ERRATUM_NMG_ETSEC129
        select SYS_FSL_ERRATUM_I2C_A004447
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR1
        select SYS_FSL_HAS_SEC
@@ -620,6 +536,7 @@ config ARCH_MPC8560
 config ARCH_MPC8568
        bool
        select FSL_LAW
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -630,6 +547,7 @@ config ARCH_MPC8569
        select FSL_LAW
        select SYS_FSL_ERRATUM_A004508
        select SYS_FSL_ERRATUM_A005125
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -644,6 +562,7 @@ config ARCH_MPC8572
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_DDR_115
        select SYS_FSL_ERRATUM_DDR111_DDR134
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR2
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
@@ -668,6 +587,7 @@ config ARCH_P1010
        select SYS_FSL_ERRATUM_P1010_A003549
        select SYS_FSL_ERRATUM_SEC_A003571
        select SYS_FSL_ERRATUM_IFC_A003399
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -689,6 +609,7 @@ config ARCH_P1011
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_ELBC_A001
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_DISABLE_ASPM
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -703,6 +624,8 @@ config ARCH_P1020
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_ELBC_A001
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_DISABLE_ASPM
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -722,6 +645,8 @@ config ARCH_P1021
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_ELBC_A001
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_DISABLE_ASPM
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -743,6 +668,7 @@ config ARCH_P1022
        select SYS_FSL_ERRATUM_ELBC_A001
        select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_ERRATUM_SATA_A001
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -756,6 +682,7 @@ config ARCH_P1023
        select SYS_FSL_ERRATUM_A004508
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_I2C_A004447
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -769,6 +696,8 @@ config ARCH_P1024
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_ELBC_A001
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_DISABLE_ASPM
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -789,6 +718,8 @@ config ARCH_P1025
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_ELBC_A001
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_DISABLE_ASPM
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -806,6 +737,7 @@ config ARCH_P2020
        select SYS_FSL_ERRATUM_A005125
        select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_ERRATUM_ESDHC_A001
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -966,6 +898,7 @@ config ARCH_T1023
        select FSL_LAW
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A008109
        select SYS_FSL_ERRATUM_A009663
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_ESDHC111
@@ -986,6 +919,7 @@ config ARCH_T1024
        select FSL_LAW
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A008109
        select SYS_FSL_ERRATUM_A009663
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_ESDHC111
@@ -1008,6 +942,7 @@ config ARCH_T1040
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_ERRATUM_A008044
        select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A008109
        select SYS_FSL_ERRATUM_A009663
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_ESDHC111
@@ -1031,6 +966,7 @@ config ARCH_T1042
        select SYS_FSL_DDR_VER_50
        select SYS_FSL_ERRATUM_A008044
        select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A008109
        select SYS_FSL_ERRATUM_A009663
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_ESDHC111
@@ -1059,8 +995,10 @@ config ARCH_T2080
        select SYS_FSL_ERRATUM_A007212
        select SYS_FSL_ERRATUM_A007815
        select SYS_FSL_ERRATUM_A007907
+       select SYS_FSL_ERRATUM_A008109
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_QORIQ_CHASSIS2
@@ -1085,6 +1023,7 @@ config ARCH_T2081
        select SYS_FSL_ERRATUM_A007212
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_ESDHC111
+       select FSL_PCIE_RESET
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_QORIQ_CHASSIS2
@@ -1135,6 +1074,7 @@ config ARCH_T4240
        select SYS_FSL_ERRATUM_A007798
        select SYS_FSL_ERRATUM_A007815
        select SYS_FSL_ERRATUM_A007907
+       select SYS_FSL_ERRATUM_A008109
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
@@ -1178,8 +1118,8 @@ config FSL_LAW
        help
                Use Freescale common code for Local Access Window
 
-config SECURE_BOOT
-       bool    "Secure Boot"
+config NXP_ESBC
+       bool    "NXP_ESBC"
        help
                Enable Freescale Secure Boot feature. Normally selected
                by defconfig. If unsure, do not change.
@@ -1418,6 +1358,12 @@ config SYS_P4080_ERRATUM_SERDES_A001
 config SYS_P4080_ERRATUM_SERDES_A005
        bool
 
+config FSL_PCIE_DISABLE_ASPM
+       bool
+
+config FSL_PCIE_RESET
+       bool
+
 config SYS_FSL_QORIQ_CHASSIS1
        bool
 
@@ -1551,12 +1497,7 @@ config SYS_FSL_LBC_CLK_DIV
                Defines divider of platform clock(clock input to
                eLBC controller).
 
-source "board/freescale/b4860qds/Kconfig"
-source "board/freescale/bsc9131rdb/Kconfig"
-source "board/freescale/bsc9132qds/Kconfig"
-source "board/freescale/c29xpcie/Kconfig"
 source "board/freescale/corenet_ds/Kconfig"
-source "board/freescale/mpc8536ds/Kconfig"
 source "board/freescale/mpc8541cds/Kconfig"
 source "board/freescale/mpc8544ds/Kconfig"
 source "board/freescale/mpc8548cds/Kconfig"
@@ -1565,22 +1506,17 @@ source "board/freescale/mpc8568mds/Kconfig"
 source "board/freescale/mpc8569mds/Kconfig"
 source "board/freescale/mpc8572ds/Kconfig"
 source "board/freescale/p1010rdb/Kconfig"
-source "board/freescale/p1022ds/Kconfig"
 source "board/freescale/p1023rdb/Kconfig"
 source "board/freescale/p1_p2_rdb_pc/Kconfig"
-source "board/freescale/p1_twr/Kconfig"
 source "board/freescale/p2041rdb/Kconfig"
 source "board/freescale/qemu-ppce500/Kconfig"
-source "board/freescale/t102xqds/Kconfig"
 source "board/freescale/t102xrdb/Kconfig"
-source "board/freescale/t1040qds/Kconfig"
 source "board/freescale/t104xrdb/Kconfig"
 source "board/freescale/t208xqds/Kconfig"
 source "board/freescale/t208xrdb/Kconfig"
-source "board/freescale/t4qds/Kconfig"
 source "board/freescale/t4rdb/Kconfig"
 source "board/gdsys/p1022/Kconfig"
-source "board/keymile/kmp204x/Kconfig"
+source "board/keymile/Kconfig"
 source "board/sbc8548/Kconfig"
 source "board/socrates/Kconfig"
 source "board/varisys/cyrus/Kconfig"